TTA-based Co-Design Environment (TCE) is a toolset for designing and programming customized processors based on the Transport Triggered Architecture (TTA). The toolset provides a complete retargetable co-design flow from high-level language programs down to synthesizable processor RTL (VHDL and Verilog backends supported) and parallel program binaries. Processor customization points include the register files, function units, supported operations, and the interconnection network.

TCE development is directed by the Customized Parallel Computing (CPC) group at the Department of Pervasive Computing of Tampere University of Technology (TUT), Finland. Further reading: LLVM project blog post about TCE.

News and updates

July 23rd, 2018: A tutorial slide deck with clickable videos uploaded

The slide set (39M) contains clickable videos and goes through most of the tool set. It was first presented in OpenSuco 3 workshop organized within the ISC High Performance 2018 conference (June 28th in Frankfurt, Germany).

March 12th, 2018: TCE 1.17 released

A new version of the toolset is now available for download.

See the release announcement and the change summary for details. Install instructions.

October 4th, 2017: TCE-based demo featured on the lab's blog

A demonstration featuring a neural network coprocessor designed with TCE was shown at CIVIT.

For more info, read the post on the Pervasive Computing blog.

September 20th, 2017: TCE 1.16 released

A new version of the toolset is now available for download.

See the release announcement and the change summary for details. Install instructions.

May 17th, 2017: New publications added

(older news here)

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