IUResource.hh

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/*
    Copyright (c) 2002-2009 Tampere University.
 
    This file is part of TTA-Based Codesign Environment (TCE).
 
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/**
 * @file IUResource.hh
 *
 * Declaration of prototype of Resource Model:
 * declaration of the IUResource class.
 *
 * @author Vladimir Guzma 2006 (vladimir.guzma-no.spam-tut.fi)
 * @note rating: red
 */
 
#ifndef TTA_IURESOURCE_HH
#define TTA_IURESOURCE_HH
 
#include <string>
#include <vector>
#include <memory>
 
#include "SchedulingResource.hh"
 
namespace TTAProgram {
    class TerminalImmediate;
}
 
namespace TTAMachine {
    class Machine;
}
 
/**
 * An interface for scheduling resources of Resource Model
 * The derived class IUResource
 */
 
class IUResource : public SchedulingResource {
public:
    virtual ~IUResource();
    IUResource(
        const TTAMachine::Machine& mach,
        const std::string& name,
        const int registers,
        const int width,
        const int latency,
        const bool signExtension,
        unsigned int initiationInterval = 0);
 
    virtual bool isInUse(const int cycle) const override;
    virtual bool isAvailable(const int cycle, int immRegIndex) const;
    virtual bool isAvailable(const int cycle) const override;
    virtual bool canAssign(const int, const MoveNode&)const override;
    virtual bool canAssign(
        const int defCycle,
        const int useCycle,
        const MoveNode& node,
    int immRegIndex) const;
    virtual void assign(const int cycle, MoveNode& node) override;
    virtual void assign(
        const int defCycle,
        const int useCycle,
        MoveNode& node,
        int& index);
 
    virtual void unassign(const int cycle, MoveNode& node) override;
 
    virtual bool isIUResource() const override;
 
    int registerCount() const;
    std::shared_ptr<TTAProgram::TerminalImmediate>
    immediateValue(const MoveNode& node) const;
    int immediateWriteCycle(const MoveNode& node) const;
    int width() const;
 
    void clearOldResources();
    void clear() override;
    
protected:
    virtual bool validateDependentGroups() override;
    virtual bool validateRelatedGroups() override;
    void setRegisterCount(const int registers);
 
private:
    bool canAssignUse(int useCycle) const;
 
    // Stores first and last cycle register is marked for use
    // also the actual value of constant to be stored in register
    struct ResourceRecordType{
        ResourceRecordType(int definition, int use, TTAProgram::TerminalImmediate* val);
        int         definition_;
        int         use_;
        std::shared_ptr<TTAProgram::TerminalImmediate> immediateValue_;
    };
    // For each register, there are several def-use combinations
    // non overlapping
    typedef std::vector<ResourceRecordType*> ResourceRecordVectorType;
    // Copying forbidden
    IUResource(const IUResource&);
    // Assignment forbidden
    IUResource& operator=(const IUResource&);
    int findAvailable(
        const int defCycle, const int useCycle, int immRegIndex) const;
 
    std::vector<ResourceRecordVectorType> resourceRecord_;
    // Number of registers in given IU
    int registerCount_;
    // The bit width of registers in IU
    int width_;
    // The latency of IU
    int latency_;
    //Extention of IU, true == sign extends, false == zero extends
    bool signExtension_;
 
    const TTAMachine::Machine& machine_;
};
#endif