OpenASIP  2.0
AlteraMemGenerator Member List

This is the complete list of members for AlteraMemGenerator, including all inherited members.

addGenerics(ProGe::NetlistBlock &topBlock, const TCEString &addrWidth, const TCEString &dataWidth, int memIndex)AlteraMemGeneratorprotectedvirtual
addLsu(TTAMachine::FunctionUnit &lsuArch, std::vector< std::string > lsuPorts)MemoryGenerator
addMemory(const ProGe::NetlistBlock &ttaCore, ProGe::NetlistBlock &integratorBlock, int memIndex, int coreId)AlteraMemGeneratorvirtual
addParameter(const ProGe::Parameter &add)MemoryGeneratorprotected
addPort(const TCEString &name, HDLPort *port)MemoryGeneratorprotected
ADDRW_GAlteraMemGeneratorprotectedstatic
addrWidth_MemoryGeneratorprivate
AlteraMemGenerator(int memMauWidth, int widthInMaus, int addrWidth, TCEString initFile, const PlatformIntegrator *integrator, std::ostream &warningStream, std::ostream &errorStream)AlteraMemGenerator
BlockPair typedefMemoryGeneratorprotected
checkFuPort(const std::string fuPort, std::vector< TCEString > &reasons) constMemoryGeneratorprotectedvirtual
CLOCK_PORTMemoryGeneratorprivatestatic
connectPorts(ProGe::NetlistBlock &netlistBlock, const ProGe::NetlistPort &memPort, const ProGe::NetlistPort &corePort, bool inverted, int coreId)MemoryGeneratorprotectedvirtual
corePortName(const TCEString &portBaseName, int coreId) constMemoryGeneratorprotected
createMemoryNetlistBlock(ProGe::NetlistBlock &integratorBlock, int memIndex, int coreId)MemoryGeneratorprotectedvirtual
DATAW_GAlteraMemGeneratorprotectedstatic
DEV_FAMILY_GAlteraMemGeneratorprotectedstatic
errorStream()MemoryGeneratorprotected
errorStream_MemoryGeneratorprivate
generateComponentFile(TCEString outputPath)=0MemoryGeneratorpure virtual
generatesComponentHdlFile() const =0MemoryGeneratorpure virtual
hasLSUArchitecture() constMemoryGeneratorprotected
INIT_FILE_GAlteraMemGeneratorprotectedstatic
initFile_MemoryGeneratorprivate
initializationFile() constMemoryGenerator
instanceName(int coreId, int memIndex) const =0MemoryGeneratorprotectedpure virtual
instantiateAlteraTemplate(const TCEString &templateFile, const TCEString &outputPath) constAlteraMemGeneratorprotected
instantiateTemplate(const TCEString &inFile, const TCEString &outFile, const TCEString &entity) constMemoryGeneratorprotected
integrator_MemoryGeneratorprivate
isCompatible(const ProGe::NetlistBlock &ttaCore, int coreId, std::vector< TCEString > &reasons) constMemoryGeneratorvirtual
lsuArch_MemoryGeneratorprivate
lsuArchitecture() constMemoryGeneratorprotected
lsuPorts_MemoryGeneratorprivate
mauWidth_MemoryGeneratorprivate
memoryAddrWidth() constMemoryGenerator
MemoryGenerator(int memMauWidth, int widthInMaus, int addrWidth, TCEString initFile, const PlatformIntegrator *integrator, std::ostream &warningStream, std::ostream &errorStream)MemoryGenerator
memoryIndexString(int coreId, int memIndex) constMemoryGeneratorprotected
memoryMauSize() constMemoryGenerator
memoryTotalWidth() constMemoryGenerator
memoryWidthInMaus() constMemoryGenerator
memPorts_MemoryGeneratorprivate
moduleName() const =0MemoryGeneratorprotectedpure virtual
parameter(int index) constMemoryGeneratorprotected
parameterCount() constMemoryGeneratorprotected
ParameterList typedefMemoryGeneratorprivate
params_MemoryGeneratorprivate
platformIntegrator() constMemoryGeneratorprotected
port(int index) constMemoryGeneratorprotected
portByKeyName(TCEString name) constMemoryGeneratorprotected
portCount() constMemoryGeneratorprotected
portKeyName(const HDLPort *port) constMemoryGeneratorprotected
PortMap typedefMemoryGeneratorprotected
RESET_PORTMemoryGeneratorprivatestatic
templatePath() constMemoryGeneratorprotected
ttaCoreName() constMemoryGeneratorprotected
warningStream()MemoryGeneratorprotected
warningStream_MemoryGeneratorprivate
widthInMaus_MemoryGeneratorprivate
~AlteraMemGenerator()AlteraMemGeneratorvirtual
~MemoryGenerator()MemoryGeneratorvirtual