#include <PlatformIntegrator.hh>

Inheritance diagram for PlatformIntegrator:

Collaboration diagram for PlatformIntegrator:

Public Member Functions
	PlatformIntegrator ()

	PlatformIntegrator (const TTAMachine::Machine machine, const IDF::MachineImplementation idf, ProGe::HDL hdl, TCEString progeOutputDir, TCEString coreEntityName, TCEString outputDir, TCEString programName, int targetClockFreq, std::ostream &warningStream, std::ostream &errorStream, const MemInfo &imem, MemType dmemType)

virtual	~PlatformIntegrator ()

virtual void	integrateProcessor (const ProGe::NetlistBlock *progeBlock)=0

virtual TCEString	deviceFamily () const =0

virtual void	setDeviceFamily (TCEString devFamily)=0

void	setDeviceName (TCEString devName)

TCEString	deviceName () const

virtual TCEString	devicePackage () const =0

virtual TCEString	deviceSpeedClass () const =0

virtual int	targetClockFrequency () const

virtual void	printInfo (std::ostream &stream) const =0

const ProGe::NetlistBlock &	progeBlock () const

const ProGe::NetlistBlock &	toplevelBlock () const

void	setSharedOutputDir (const TCEString &sharedDir)

TCEString	outputPath () const

TCEString	outputFilePath (TCEString fileName, bool absolute=false) const

TCEString	coreEntityName () const

const TTAMachine::Machine *	machine () const

const IDF::MachineImplementation *	idf () const

const MemInfo &	imemInfo () const

const MemInfo &	dmemInfo (TTAMachine::AddressSpace *as) const

const MemInfo &	dmemInfo (int index) const

int	dmemCount () const

ProGe::NetlistPort *	clockPort () const

ProGe::NetlistPort *	resetPort () const

Protected Member Functions
ProGe::NetlistBlock *	integratorBlock ()

virtual void	initPlatformNetlist (const ProGe::NetlistBlock *progeBlock)

virtual bool	integrateCore (const ProGe::NetlistBlock &cores, int coreId)

virtual void	exportUnconnectedPorts (int coreId)

virtual void	connectToplevelPort (const ProGe::NetlistPort &corePort, const TCEString signalPrefix="")

virtual TCEString	pinTag () const =0

virtual bool	chopTaggedSignals () const =0

virtual bool	hasPinTag (const TCEString &signal) const

void	copyProgeBlockToNetlist (const ProGe::NetlistBlock *progeBlock)

virtual bool	createMemories (int coreId)

virtual bool	generateMemory (MemoryGenerator &memGen, std::vector< TCEString > &generatedFiles, int memIndex, int coreId)

virtual MemoryGenerator &	imemInstance (MemInfo imem, int coreId)=0

virtual MemoryGenerator &	dmemInstance (MemInfo dmem, TTAMachine::FunctionUnit &lsuArch, std::vector< std::string > lsuPorts)=0

virtual void	writeNewToplevel ()

virtual ProjectFileGenerator *	projectFileGenerator () const =0

void	addProGeFiles () const

TCEString	programName () const

TCEString	progeFilePath (TCEString fileName, bool absolute=false) const

TCEString	chopSignalToTag (const TCEString &original, const TCEString &tag) const

void	progeOutputHdlFiles (std::vector< TCEString > &files) const

std::ostream &	warningStream () const

std::ostream &	errorStream () const

TCEString	platformEntityName () const

void	parseDataMemories ()

void	clearDataMemories ()

MemInfo	readLsuParameters (const TTAMachine::FunctionUnit &lsu)

Static Protected Attributes
static const TCEString	TTA_CORE_CLK = "clk"

static const TCEString	TTA_CORE_RSTX = "rstx"

Private Member Functions
void	createOutputDir ()

std::vector< std::string >	loadFUExternalPorts (TTAMachine::FunctionUnit &fu) const

Private Attributes
const TTAMachine::Machine *	machine_

const IDF::MachineImplementation *	idf_

ProGe::NetlistBlock *	integratorBlock_

ProGe::HDL	hdl_

TCEString	progeOutputDir_

TCEString	sharedOutputDir_

TCEString	coreEntityName_

TCEString	outputDir_

TCEString	programName_

TCEString	deviceName_

int	targetFrequency_

std::ostream &	warningStream_

std::ostream &	errorStream_

ProGe::NetlistBlock *	ttaCores_

MemInfo	imem_

MemType	dmemType_

std::map< TTAMachine::AddressSpace *, MemInfo >	dmem_

std::vector< TTAMachine::FunctionUnit * >	lsus_

ProGe::NetlistPort *	clkPort_

ProGe::NetlistPort *	resetPort_

std::multimap< TCEString, const ProGe::NetlistPort * > *	unconnectedPorts_

Detailed Description

Definition at line 65 of file PlatformIntegrator.hh.

Constructor & Destructor Documentation

◆ PlatformIntegrator() [1/2]

PlatformIntegrator::PlatformIntegrator ( )

Definition at line 68 of file PlatformIntegrator.cc.

     : machine_(NULL),
       idf_(NULL),
       integratorBlock_(NULL),
       hdl_(ProGe::VHDL),
       progeOutputDir_(""),
       coreEntityName_(""),
       outputDir_(""),
       programName_(""),
       targetFrequency_(0),
       warningStream_(std::cout),
       errorStream_(std::cerr),
       ttaCores_(NULL),
       imem_(),
       dmemType_(UNKNOWN),
       dmem_(),
       lsus_(),
       clkPort_(NULL),
       resetPort_(NULL),
       unconnectedPorts_(NULL) {
     imem_.type = UNKNOWN;
 }

References imem_, MemInfo::type, and UNKNOWN.

◆ PlatformIntegrator() [2/2]

PlatformIntegrator::PlatformIntegrator	(	const TTAMachine::Machine *	machine,
		const IDF::MachineImplementation *	idf,
		ProGe::HDL	hdl,
		TCEString	progeOutputDir,
		TCEString	coreEntityName,
		TCEString	outputDir,
		TCEString	programName,
		int	targetClockFreq,
		std::ostream &	warningStream,
		std::ostream &	errorStream,
		const MemInfo &	imem,
		MemType	dmemType
	)

Definition at line 91 of file PlatformIntegrator.cc.

     : machine_(machine),
       idf_(idf),
       integratorBlock_(NULL),
       hdl_(hdl),
       progeOutputDir_(progeOutputDir),
       sharedOutputDir_(""),
       coreEntityName_(coreEntityName),
       outputDir_(outputDir),
       programName_(programName),
       targetFrequency_(targetClockFreq),
       warningStream_(warningStream),
       errorStream_(errorStream),
       ttaCores_(NULL),
       imem_(imem),
       dmemType_(dmemType),
       dmem_(),
       lsus_(),
       clkPort_(NULL),
       resetPort_(NULL),
       unconnectedPorts_(NULL) {
     integratorBlock_ =
         new NetlistBlock(platformEntityName(), platformEntityName() + "inst");
  
     createOutputDir();
 }

References createOutputDir(), integratorBlock_, and platformEntityName().

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◆ ~PlatformIntegrator()

PlatformIntegrator::~PlatformIntegrator ( )

virtual

Definition at line 123 of file PlatformIntegrator.cc.

123 { delete integratorBlock_; }

References integratorBlock_.

Member Function Documentation

◆ addProGeFiles()

void PlatformIntegrator::addProGeFiles ( ) const

protected

Definition at line 640 of file PlatformIntegrator.cc.

                                         {
  
     vector<TCEString> progeOutFiles;
     progeOutputHdlFiles(progeOutFiles);
     for (unsigned int i = 0; i < progeOutFiles.size(); i++) {
         projectFileGenerator()->addHdlFile(progeOutFiles.at(i));
     }
 }

References ProjectFileGenerator::addHdlFile(), progeOutputHdlFiles(), and projectFileGenerator().

Referenced by AlteraIntegrator::integrateProcessor(), AlmaIFIntegrator::integrateProcessor(), Stratix3DevKitIntegrator::integrateProcessor(), and Stratix2DSPBoardIntegrator::integrateProcessor().

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◆ chopSignalToTag()

TCEString PlatformIntegrator::chopSignalToTag	(	const TCEString &	original,
		const TCEString &	tag
	)		const

protected

Utility function for processing vhdl signals.

Signal name format is fu_name_<TAG>_name : <dir> <type> {);} This function chops the signal name in such way that the name starts from <TAG> i.e. returns <TAG>_name : <dir> <type> {);}

Parameters

original	Original signal name
tag	Starting tag

Returns: Chopped string

Definition at line 185 of file PlatformIntegrator.cc.

                                 {
  
     TCEString signal = original;
     if (original.find(tag) != TCEString::npos) {
         signal = original.substr(original.find(tag));
     }
     return StringTools::trim(signal);
 }

References StringTools::trim().

Referenced by connectToplevelPort().

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◆ chopTaggedSignals()

virtual bool PlatformIntegrator::chopTaggedSignals ( ) const

protectedpure virtual

Implemented in Stratix2DSPBoardIntegrator, Stratix3DevKitIntegrator, AvalonIntegrator, KoskiIntegrator, and AlmaIFIntegrator.

Referenced by connectToplevelPort().

◆ clearDataMemories()

void PlatformIntegrator::clearDataMemories ( )

protected

Definition at line 361 of file PlatformIntegrator.cc.

                                       {
     dmem_.clear();
     lsus_.clear();
 }

References dmem_, and lsus_.

◆ clockPort()

ProGe::NetlistPort * PlatformIntegrator::clockPort ( ) const

Definition at line 692 of file PlatformIntegrator.cc.

                                     {
  
     if (clkPort_ == NULL) {
         TCEString msg;
         msg << "PlatformIntegrator was not initialized properly";
         throw ObjectNotInitialized(__FILE__, __LINE__, __func__, msg);
     }
     return clkPort_;
 }

References __func__, and clkPort_.

Referenced by XilinxBlockRamGenerator::addMemory(), MemoryGenerator::addMemory(), MemoryGenerator::corePortName(), AlmaIFIntegrator::initAlmaifBlock(), AlmaIFIntegrator::integrateCore(), and integrateCore().

◆ connectToplevelPort()

void PlatformIntegrator::connectToplevelPort	(	const ProGe::NetlistPort &	corePort,
		const TCEString	signalPrefix = `""`
	)

protectedvirtual

Definition at line 464 of file PlatformIntegrator.cc.

                                                                     {
     TCEString toplevelName = corePort.name();
     if (chopTaggedSignals() && hasPinTag(toplevelName)) {
         toplevelName = signalPrefix + chopSignalToTag(toplevelName, pinTag());
     }
     NetlistPort* topPort = NULL;
     if (corePort.realWidthAvailable()) {
         int width = corePort.realWidth();
         if (width == 0 || width == 1) {
             topPort = new NetlistPort(
                 toplevelName, corePort.widthFormula(), corePort.realWidth(),
                 ProGe::BIT, corePort.direction(), *integratorBlock());
         } else {
             topPort = new NetlistPort(
                 toplevelName, corePort.widthFormula(), corePort.realWidth(),
                 ProGe::BIT_VECTOR, corePort.direction(), *integratorBlock());
         }
     } else {
         topPort = new NetlistPort(
             toplevelName, corePort.widthFormula(), corePort.dataType(),
             corePort.direction(), *integratorBlock());
     }
     if (topPort->dataType() == corePort.dataType()) {
         integratorBlock()->netlist().connect(*topPort, corePort);
     } else {
         integratorBlock()->netlist().connect(*topPort, corePort, 0, 0, 1);
     }
 }

References ProGe::BIT, ProGe::BIT_VECTOR, chopSignalToTag(), chopTaggedSignals(), ProGe::Netlist::connect(), ProGe::NetlistPort::dataType(), ProGe::NetlistPort::direction(), hasPinTag(), integratorBlock(), ProGe::NetlistPort::name(), ProGe::NetlistBlock::netlist(), pinTag(), ProGe::NetlistPort::realWidth(), ProGe::NetlistPort::realWidthAvailable(), and ProGe::NetlistPort::widthFormula().

Referenced by AlmaIFIntegrator::exportUnconnectedPorts(), and exportUnconnectedPorts().

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◆ copyProgeBlockToNetlist()

void PlatformIntegrator::copyProgeBlockToNetlist ( const ProGe::NetlistBlock * progeBlock )

protected

Copies the ProGe generated toplevel block (i.e. tta core(s)) to a new netlist.

Parameters

progeBlock The toplevel netlist block created by ProGe

Definition at line 502 of file PlatformIntegrator.cc.

                                          {
     ttaCores_ = progeBlock->shallowCopy("core");
     NetlistBlock& top = *integratorBlock_;
     top.addSubBlock(ttaCores_);
  
     // copy parameters to the current toplevel
     for (size_t i = 0; i < ttaCores_->parameterCount(); i++) {
         // Filter out some parameters not usable in the integrator block.
         if (ttaCores_->parameter(i).name() == "core_id") {
             continue;
         }
  
         top.setParameter(ttaCores_->parameter(i));
     }
  
     // copy package references to the current toplevel
     for (size_t i = 0; i < ttaCores_->packageCount(); i++) {
         top.addPackage(ttaCores_->package(i));
     }
  
     for (size_t i = 0; i < ttaCores_->netlist().parameterCount(); i++) {
         top.netlist().setParameter(ttaCores_->netlist().parameter(i));
     }
 }

References ProGe::NetlistBlock::addPackage(), ProGe::NetlistBlock::addSubBlock(), integratorBlock_, ProGe::Parameter::name(), ProGe::NetlistBlock::netlist(), ProGe::NetlistBlock::package(), ProGe::NetlistBlock::packageCount(), ProGe::NetlistBlock::parameter(), ProGe::Netlist::parameter(), ProGe::BaseNetlistBlock::parameterCount(), progeBlock(), ProGe::NetlistBlock::setParameter(), ProGe::Netlist::setParameter(), ProGe::NetlistBlock::shallowCopy(), and ttaCores_.

Referenced by initPlatformNetlist().

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◆ coreEntityName()

TCEString PlatformIntegrator::coreEntityName ( ) const

Return TTA core entity name

Definition at line 126 of file PlatformIntegrator.cc.

                                          {
     
     return coreEntityName_;
 }

References coreEntityName_.

Referenced by AlmaIFIntegrator::addAlmaifFiles(), platformEntityName(), progeOutputHdlFiles(), MemoryGenerator::ttaCoreName(), and writeNewToplevel().

◆ createMemories()

bool PlatformIntegrator::createMemories ( int coreId )

protectedvirtual

Definition at line 542 of file PlatformIntegrator.cc.

                                              {
     assert(imem_.type != UNKNOWN);
  
     int imemIndex = 0;
     MemoryGenerator& imemGen = imemInstance(imem_, coreId);
     vector<TCEString> imemFiles;
  
     if (imem_.type != NONE) {
         if (!generateMemory(imemGen, imemFiles, imemIndex, coreId)) {
             return false;
         }
         if (imemFiles.size() != 0) {
             projectFileGenerator()->addHdlFiles(imemFiles);
         }
     }
  
     for (unsigned int i = 0; i < lsus_.size(); i++) {
         TTAMachine::FunctionUnit* lsuArch = lsus_.at(i);
         std::vector<std::string> ports = loadFUExternalPorts(*lsuArch);
  
         TTAMachine::AddressSpace* as = lsuArch->addressSpace();
         assert(dmem_.find(as) != dmem_.end() && "Address space not found!");
  
         MemoryGenerator& dmemGen =
             dmemInstance(dmem_.find(as)->second, *lsuArch, ports);
         vector<TCEString> dmemFiles;
         if (!generateMemory(dmemGen, dmemFiles, i, coreId)) {
             return false;
         }
         if (dmemFiles.size() != 0) {
             projectFileGenerator()->addHdlFiles(dmemFiles);
         }
     }
     return true;
 }

References ProjectFileGenerator::addHdlFiles(), TTAMachine::FunctionUnit::addressSpace(), assert, dmem_, dmemInstance(), generateMemory(), imem_, imemInstance(), loadFUExternalPorts(), lsus_, NONE, projectFileGenerator(), MemInfo::type, and UNKNOWN.

Referenced by AlmaIFIntegrator::integrateCore(), and integrateCore().

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◆ createOutputDir()

void PlatformIntegrator::createOutputDir ( )

private

Definition at line 260 of file PlatformIntegrator.cc.

                                     {
  
     TCEString absolute = FileSystem::absolutePathOf(outputDir_);
     if (!FileSystem::createDirectory(absolute)) {
         throw IOException(__FILE__, __LINE__, "PlatformIntegrator",
                           "Couldn't create dir " + absolute);
     }
 }

References FileSystem::absolutePathOf(), FileSystem::createDirectory(), and outputDir_.

Referenced by PlatformIntegrator().

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◆ deviceFamily()

virtual TCEString PlatformIntegrator::deviceFamily ( ) const

pure virtual

Returns the FPGA device family

Implemented in Stratix2DSPBoardIntegrator, Stratix3DevKitIntegrator, AlmaIFIntegrator, AvalonIntegrator, and KoskiIntegrator.

Referenced by AlteraMemGenerator::addGenerics(), and QuartusProjectGenerator::writeQSFFile().

◆ deviceName()

TCEString PlatformIntegrator::deviceName ( ) const

inline

Definition at line 114 of file PlatformIntegrator.hh.

114 { return deviceName_; }

References deviceName_.

Referenced by AlmaIFIntegrator::addAlmaifFiles(), and QuartusProjectGenerator::writeQSFFile().

◆ devicePackage()

virtual TCEString PlatformIntegrator::devicePackage ( ) const

pure virtual

Returns the device package name

Implemented in Stratix2DSPBoardIntegrator, Stratix3DevKitIntegrator, AlmaIFIntegrator, AvalonIntegrator, and KoskiIntegrator.

◆ deviceSpeedClass()

virtual TCEString PlatformIntegrator::deviceSpeedClass ( ) const

pure virtual

Returns the device speed class

Implemented in Stratix2DSPBoardIntegrator, Stratix3DevKitIntegrator, AlmaIFIntegrator, AvalonIntegrator, and KoskiIntegrator.

◆ dmemCount()

int PlatformIntegrator::dmemCount ( ) const

Definition at line 685 of file PlatformIntegrator.cc.

                                     {
  
     return dmem_.size();
 }

References dmem_.

Referenced by IPXactFileGenerator::addAddressSpaces().

◆ dmemInfo() [1/2]

const MemInfo & PlatformIntegrator::dmemInfo ( int index ) const

Definition at line 667 of file PlatformIntegrator.cc.

                                             {
  
     if (index > static_cast<int>(dmem_.size())) {
         TCEString msg = "Data memory index out of range";
         throw OutOfRange(__FILE__, __LINE__, "PlatformIntegrator", msg);
     }
     std::map<TTAMachine::AddressSpace*, MemInfo>::const_iterator iter =
         dmem_.begin();
     int i = 0;
     while (i < index) {
         iter++;
         i++;
     }
     assert(iter != dmem_.end());
     return iter->second;
 }

References assert, and dmem_.

◆ dmemInfo() [2/2]

const MemInfo & PlatformIntegrator::dmemInfo ( TTAMachine::AddressSpace * as ) const

Definition at line 657 of file PlatformIntegrator.cc.

                                                              {
  
     if (as == NULL || dmem_.find(as) == dmem_.end()) {
         TCEString msg = "Invalid address space";
         throw InvalidData(__FILE__, __LINE__, "PlatformIntegrator", msg);
     }
     return dmem_.find(as)->second;
 }

References dmem_.

◆ dmemInstance()

virtual MemoryGenerator& PlatformIntegrator::dmemInstance	(	MemInfo	dmem,
		TTAMachine::FunctionUnit &	lsuArch,
		std::vector< std::string >	lsuPorts
	)

protectedpure virtual

Implemented in Stratix2DSPBoardIntegrator, AlmaIFIntegrator, KoskiIntegrator, and AlteraIntegrator.

Referenced by createMemories().

◆ errorStream()

std::ostream & PlatformIntegrator::errorStream ( ) const

protected

Definition at line 278 of file PlatformIntegrator.cc.

                                       {
  
     return errorStream_;
 }

References errorStream_.

Referenced by AlteraIntegrator::dmemInstance(), KoskiIntegrator::dmemInstance(), AlmaIFIntegrator::dmemInstance(), Stratix2DSPBoardIntegrator::dmemInstance(), generateMemory(), AlteraIntegrator::imemInstance(), AlmaIFIntegrator::imemInstance(), and progeOutputHdlFiles().

◆ exportUnconnectedPorts()

void PlatformIntegrator::exportUnconnectedPorts ( int coreId )

protectedvirtual

Reimplemented in AlmaIFIntegrator.

Definition at line 453 of file PlatformIntegrator.cc.

                                                 {
     const NetlistBlock& core = progeBlock();
     for (size_t i = 0; i < core.portCount(); i++) {
         const NetlistPort& port = core.port(i);
         if (!integratorBlock()->netlist().isPortConnected(port)) {
             connectToplevelPort(port);
         }
     }
 }

References connectToplevelPort(), integratorBlock(), ProGe::NetlistBlock::port(), ProGe::NetlistBlock::portCount(), and progeBlock().

Referenced by AlmaIFIntegrator::exportUnconnectedPorts(), and integrateCore().

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◆ generateMemory()

bool PlatformIntegrator::generateMemory	(	MemoryGenerator &	memGen,
		std::vector< TCEString > &	generatedFiles,
		int	memIndex,
		int	coreId
	)

protectedvirtual

Definition at line 579 of file PlatformIntegrator.cc.

                               {
     const NetlistBlock& ttaCores = progeBlock();
  
     vector<TCEString> reasons;
     if (!memGen.isCompatible(ttaCores, coreId, reasons)) {
         errorStream() << "TTA core doesn't have compatible memory "
                       <<"interface:" << std::endl;
         for (unsigned int i = 0; i < reasons.size(); i++) {
             errorStream() << reasons.at(i) << std::endl;
         }
         return false;
     }
  
     memGen.addMemory(ttaCores, *integratorBlock(), memIndex, coreId);
  
     if (memGen.generatesComponentHdlFile()) {
         generatedFiles =
             memGen.generateComponentFile(outputPath());
         if (generatedFiles.size() == 0) {
             errorStream() << "Failed to create mem component" << endl;
             return false;
         }
     }
  
     return true;
 }

References MemoryGenerator::addMemory(), errorStream(), MemoryGenerator::generateComponentFile(), MemoryGenerator::generatesComponentHdlFile(), integratorBlock(), MemoryGenerator::isCompatible(), outputPath(), and progeBlock().

Referenced by createMemories().

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◆ hasPinTag()

bool PlatformIntegrator::hasPinTag ( const TCEString & signal ) const

protectedvirtual

Definition at line 495 of file PlatformIntegrator.cc.

                                                            {
     
     return signal.find(pinTag()) != TCEString::npos;
 }

References pinTag().

Referenced by connectToplevelPort().

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◆ idf()

const IDF::MachineImplementation * PlatformIntegrator::idf ( ) const

Definition at line 304 of file PlatformIntegrator.cc.

                               {
  
     return idf_;
 }

References idf_.

Referenced by AlmaIFIntegrator::AlmaIFIntegrator(), and loadFUExternalPorts().

◆ imemInfo()

const MemInfo & PlatformIntegrator::imemInfo ( ) const

Definition at line 651 of file PlatformIntegrator.cc.

                                    {
  
     return imem_;
 }

References imem_.

Referenced by AlmaIFIntegrator::axiAddressWidth(), AlmaIFIntegrator::imemInstance(), AlmaIFIntegrator::initAlmaifBlock(), and AlmaIFIntegrator::integrateCore().

◆ imemInstance()

virtual MemoryGenerator& PlatformIntegrator::imemInstance	(	MemInfo	imem,
		int	coreId
	)

protectedpure virtual

Implemented in AlmaIFIntegrator, and AlteraIntegrator.

Referenced by createMemories().

◆ initPlatformNetlist()

void PlatformIntegrator::initPlatformNetlist ( const ProGe::NetlistBlock * progeBlock )

protectedvirtual

Initializes the platform integrator netlist

Copies a TTA core to a new netlist, adds clock and reset ports to the new netlist.

Parameters

progeBlock The toplevel netlist block created by ProGe

Definition at line 317 of file PlatformIntegrator.cc.

                                          {
     NetlistBlock* highestBlock = integratorBlock_;
     // Must add ports to highest block *before* copying tta toplevel
     clkPort_ = new NetlistPort(
         TTA_CORE_CLK, "0", 1, ProGe::BIT, ProGe::IN, *highestBlock);
     resetPort_ = new NetlistPort(
         TTA_CORE_RSTX, "0", 1, ProGe::BIT, ProGe::IN, *highestBlock);
     copyProgeBlockToNetlist(progeBlock);
  
     if (dmemType_ != NONE) {
         parseDataMemories();
     }
 }

References ProGe::BIT, clkPort_, copyProgeBlockToNetlist(), dmemType_, ProGe::IN, integratorBlock_, NONE, parseDataMemories(), progeBlock(), resetPort_, TTA_CORE_CLK, and TTA_CORE_RSTX.

Referenced by AlteraIntegrator::integrateProcessor(), AlmaIFIntegrator::integrateProcessor(), Stratix3DevKitIntegrator::integrateProcessor(), and Stratix2DSPBoardIntegrator::integrateProcessor().

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◆ integrateCore()

bool PlatformIntegrator::integrateCore	(	const ProGe::NetlistBlock &	cores,
		int	coreId
	)

protectedvirtual

Integrates a single TTA core

Parameters

cores	NetlistBlock containing the core(s)
coreId	Index of the core to be integrated

Reimplemented in AlmaIFIntegrator.

Definition at line 434 of file PlatformIntegrator.cc.

                                                 {
     TCEString clkPortName = PlatformIntegrator::TTA_CORE_CLK;
     TCEString resetPortName = PlatformIntegrator::TTA_CORE_RSTX;
     const NetlistPort* coreClk = cores.port(clkPortName);
     const NetlistPort* coreRstx = cores.port(resetPortName);
     integratorBlock()->netlist().connect(*clockPort(), *coreClk);
     integratorBlock()->netlist().connect(*resetPort(), *coreRstx);
  
     if (!createMemories(coreId)) {
         return false;
     }
  
     exportUnconnectedPorts(coreId);
  
     return true;
 }

References clockPort(), ProGe::Netlist::connect(), createMemories(), exportUnconnectedPorts(), integratorBlock(), ProGe::NetlistBlock::netlist(), ProGe::NetlistBlock::port(), resetPort(), TTA_CORE_CLK, and TTA_CORE_RSTX.

Referenced by AlteraIntegrator::integrateProcessor(), Stratix3DevKitIntegrator::integrateProcessor(), and Stratix2DSPBoardIntegrator::integrateProcessor().

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◆ integrateProcessor()

virtual void PlatformIntegrator::integrateProcessor ( const ProGe::NetlistBlock * progeBlock )

pure virtual

Integrates the TTA core(s) generated by ProGe

Parameters

progeBlock The toplevel netlist block created by ProGe

Implemented in Stratix2DSPBoardIntegrator, Stratix3DevKitIntegrator, AlmaIFIntegrator, and AlteraIntegrator.

Referenced by ProGe::ProGeUI::integrateProcessor().

◆ integratorBlock()

ProGe::NetlistBlock * PlatformIntegrator::integratorBlock ( )

protected

Definition at line 291 of file PlatformIntegrator.cc.

                                     {
     assert(integratorBlock_ != NULL);
     return integratorBlock_;
 }

References assert, and integratorBlock_.

Referenced by connectToplevelPort(), AlmaIFIntegrator::exportUnconnectedPorts(), exportUnconnectedPorts(), generateMemory(), AlmaIFIntegrator::initAlmaifBlock(), AlmaIFIntegrator::integrateCore(), integrateCore(), Stratix3DevKitIntegrator::mapToplevelPorts(), and Stratix2DSPBoardIntegrator::mapToplevelPorts().

◆ loadFUExternalPorts()

std::vector< std::string > PlatformIntegrator::loadFUExternalPorts ( TTAMachine::FunctionUnit & fu ) const

private

Definition at line 367 of file PlatformIntegrator.cc.

                                                                         {
     if (idf()->hasFUImplementation(fu.name())) {
         IDF::FUImplementationLocation location =
             idf()->fuImplementation(fu.name());
         TCEString hdb = location.hdbFile();
         int id = location.id();
         HDB::HDBManager& manager = HDB::HDBRegistry::instance().hdb(hdb);
         HDB::FUEntry* entry = manager.fuByEntryID(id);
  
         if (!entry->hasImplementation()) {
             TCEString msg = "HDB entry for " + fu.name() +
                             " does not contain " + "implementation!";
             throw InvalidData(__FILE__, __LINE__, "PlatformIntegrator", msg);
         }
  
         auto implementation = entry->implementation();
  
         std::vector<std::string> ports;
         for (int i = 0; i > implementation.externalPortCount(); ++i) {
             ports.push_back(implementation.externalPort(i).name());
         }
         return ports;
     } else if (idf()->hasFUGeneration(fu.name())) {
         // quick fix: assume AlmaIF ports
         std::vector<std::string> ports = {
             "avalid_out", "aready_in",  "aaddr_out", "awren_out", "astrb_out",
             "rvalid_in",  "rready_out", "rdata_in",  "adata_out"};
         return ports;
     } else {
         TCEString msg = "Function Unit " + fu.name() + " does not have an " +
                         "implementation!";
         throw InvalidData(__FILE__, __LINE__, "PlatformIntegrator", msg);
     }
 }

References HDB::HDBManager::fuByEntryID(), IDF::MachineImplementation::fuImplementation(), HDB::FUEntry::hasImplementation(), HDB::HDBRegistry::hdb(), IDF::UnitImplementationLocation::hdbFile(), IDF::UnitImplementationLocation::id(), idf(), HDB::FUEntry::implementation(), implementation, HDB::HDBRegistry::instance(), and TTAMachine::Component::name().

Referenced by createMemories().

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◆ machine()

const TTAMachine::Machine * PlatformIntegrator::machine ( ) const

Definition at line 297 of file PlatformIntegrator.cc.

                                   {
  
     return machine_;
 }

References machine_.

Referenced by AlmaIFIntegrator::findMemories(), and AlmaIFIntegrator::initAlmaifBlock().

◆ outputFilePath()

TCEString PlatformIntegrator::outputFilePath	(	TCEString	fileName,
		bool	absolute = `false`
	)		const

Returns string to the platform integrator output path of the fileName

Parameters

filename	Name of file
absolute	Return absolute path

Returns: Path to file

Definition at line 154 of file PlatformIntegrator.cc.

                                              {
  
     TCEString pathToFile =
         outputDir_ + FileSystem::DIRECTORY_SEPARATOR + fileName;
     
     if (absolute) {
         pathToFile = FileSystem::absolutePathOf(pathToFile);
     }
     
     return pathToFile;
 }

References FileSystem::absolutePathOf(), FileSystem::DIRECTORY_SEPARATOR, and outputDir_.

Referenced by AlmaIFIntegrator::addAlmaifFiles(), AlmaIFIntegrator::copyPlatformFile(), SOPCBuilderFileGenerator::writeModuleProperties(), and writeNewToplevel().

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◆ outputPath()

TCEString PlatformIntegrator::outputPath ( ) const

Returns the platform integrator output path string. Might not exist.

Returns: Platform Integrator output path

Definition at line 179 of file PlatformIntegrator.cc.

                                      {
     return outputDir_;
 }

References outputDir_.

Referenced by AlmaIFIntegrator::addAlmaifFiles(), AlmaIFIntegrator::copyPlatformFile(), generateMemory(), and writeNewToplevel().

◆ parseDataMemories()

void PlatformIntegrator::parseDataMemories ( )

protected

Definition at line 334 of file PlatformIntegrator.cc.

                                       {
     TTAMachine::Machine::FunctionUnitNavigator fuNav =
         machine_->functionUnitNavigator();
     for (int i = 0; i < fuNav.count(); i++) {
         TTAMachine::FunctionUnit* fu = fuNav.item(i);
         if (fu->hasAddressSpace()) {
             TTAMachine::AddressSpace* as = fu->addressSpace();
  
             bool isLSU = false;
             for (int i = 0; i < fu->operationCount(); ++i) {
                 std::string operation = fu->operation(i)->name();
                 std::string prefix = operation.substr(0, 2);
                 if (prefix == "ld" || prefix == "st") {
                     isLSU = true;
                     break;
                 }
             }
  
             if (isLSU) {
                 dmem_[as] = readLsuParameters(*fu);
                 lsus_.push_back(fu);
             }
         }
     }
 }

References TTAMachine::FunctionUnit::addressSpace(), TTAMachine::Machine::Navigator< ComponentType >::count(), dmem_, TTAMachine::Machine::functionUnitNavigator(), TTAMachine::FunctionUnit::hasAddressSpace(), TTAMachine::Machine::Navigator< ComponentType >::item(), lsus_, machine_, TTAMachine::HWOperation::name(), TTAMachine::FunctionUnit::operation(), TTAMachine::FunctionUnit::operationCount(), and readLsuParameters().

Referenced by initPlatformNetlist().

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◆ pinTag()

virtual TCEString PlatformIntegrator::pinTag ( ) const

protectedpure virtual

Implemented in Stratix2DSPBoardIntegrator, Stratix3DevKitIntegrator, AvalonIntegrator, KoskiIntegrator, and AlmaIFIntegrator.

Referenced by connectToplevelPort(), and hasPinTag().

◆ platformEntityName()

TCEString PlatformIntegrator::platformEntityName ( ) const

protected

Definition at line 311 of file PlatformIntegrator.cc.

                                              {
  
     return coreEntityName() + "_toplevel";
 }

References coreEntityName().

Referenced by PlatformIntegrator(), and writeNewToplevel().

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◆ printInfo()

virtual void PlatformIntegrator::printInfo ( std::ostream & stream ) const

pure virtual

Prints information about the platform

Implemented in Stratix2DSPBoardIntegrator, Stratix3DevKitIntegrator, AvalonIntegrator, KoskiIntegrator, and AlmaIFIntegrator.

◆ progeBlock()

const ProGe::NetlistBlock & PlatformIntegrator::progeBlock ( ) const

Returns the netlist block created by ProGe which contains the tta cores

Definition at line 530 of file PlatformIntegrator.cc.

                                      {
     assert(ttaCores_ != NULL);
     return *ttaCores_;
 }

References assert, and ttaCores_.

Referenced by copyProgeBlockToNetlist(), exportUnconnectedPorts(), generateMemory(), initPlatformNetlist(), AlteraIntegrator::integrateProcessor(), AlmaIFIntegrator::integrateProcessor(), Stratix3DevKitIntegrator::integrateProcessor(), and Stratix2DSPBoardIntegrator::integrateProcessor().

◆ progeFilePath()

TCEString PlatformIntegrator::progeFilePath	(	TCEString	fileName,
		bool	absolute = `false`
	)		const

protected

Returns string to the proge-output path of the fileName

Parameters

filename	Name of file
absolute	Return absolute path

Returns: Path to file

Definition at line 140 of file PlatformIntegrator.cc.

                                                                          {
  
     TCEString pathToFile =
         progeOutputDir_ + FileSystem::DIRECTORY_SEPARATOR + fileName;
  
     if (absolute) {
         pathToFile = FileSystem::absolutePathOf(pathToFile);
     }
  
     return pathToFile;
 }

References FileSystem::absolutePathOf(), FileSystem::DIRECTORY_SEPARATOR, and progeOutputDir_.

Referenced by AlmaIFIntegrator::addAlmaifFiles(), and AlmaIFIntegrator::copyPlatformFile().

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◆ progeOutputHdlFiles()

void PlatformIntegrator::progeOutputHdlFiles ( std::vector< TCEString > & files ) const

protected

Appends all the vhdl files from ProGe output directory's vhdl and gcu_ic subdirectories to the given vector.

Parameters

files Vector where the filenames are appended to.

Definition at line 198 of file PlatformIntegrator.cc.

                                        {
  
     bool makeAbsolute = false;
     try {
         TCEString gcuPath = 
             progeOutputDir_ + FileSystem::DIRECTORY_SEPARATOR + "gcu_ic";
         std::vector<std::string> gcuFiles = 
             FileSystem::directoryContents(gcuPath, makeAbsolute);
  
         for (unsigned int i = 0; i < gcuFiles.size(); i++) {
             files.push_back(gcuFiles.at(i));
         }
     } catch (FileNotFound& e) {
         errorStream() << "Error: " << e.errorMessage() << std::endl;
         throw e;
     }
     
     try {
         bool foundImemMau = false;
         TCEString imemMau = coreEntityName() + "_imem_mau_pkg.vhdl";
  
         TCEString vhdlPath =
             progeOutputDir_ + FileSystem::DIRECTORY_SEPARATOR + "vhdl";
         std::vector<std::string> vhdlFiles =
             FileSystem::directoryContents(vhdlPath, makeAbsolute);
         for (unsigned int i = 0; i < vhdlFiles.size(); i++) {
             if (vhdlFiles.at(i).find(imemMau) != TCEString::npos) {
                 foundImemMau = true;
             }
             files.push_back(vhdlFiles.at(i));
         }
         
         // imem_mau_pkg was not yet present, but add it to file list
         if (!foundImemMau) {
             TCEString path = 
                 vhdlPath + FileSystem::DIRECTORY_SEPARATOR + imemMau;
             files.push_back(path);
         }
     } catch (FileNotFound& e) {
         errorStream() << "Error: " << e.errorMessage() << std::endl;
         throw e;
     }
  
     if (!sharedOutputDir_.empty()) {
         try {
             std::string sharedVhdl =
                 sharedOutputDir_ + FileSystem::DIRECTORY_SEPARATOR + "vhdl";
             std::vector<std::string> sharedFiles = 
                 FileSystem::directoryContents(sharedVhdl, makeAbsolute);
             for (unsigned int i = 0; i < sharedFiles.size(); i++) {
                 files.push_back(sharedFiles.at(i));
             }
         } catch (FileNotFound& e) {
             errorStream() << "Error: " << e.errorMessage() << std::endl;
             throw e;
         }
     }
 }

References coreEntityName(), FileSystem::DIRECTORY_SEPARATOR, FileSystem::directoryContents(), Exception::errorMessage(), errorStream(), progeOutputDir_, and sharedOutputDir_.

Referenced by addProGeFiles().

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◆ programName()

TCEString PlatformIntegrator::programName ( ) const

protected

Returns the scheduled program name without .tpef ending

Definition at line 133 of file PlatformIntegrator.cc.

                                       {
  
     return programName_;
 }

References programName_.

Referenced by AlteraIntegrator::dmemInstance(), KoskiIntegrator::dmemInstance(), Stratix2DSPBoardIntegrator::dmemInstance(), AlteraIntegrator::imemInstance(), and AlmaIFIntegrator::imemInstance().

◆ projectFileGenerator()

virtual ProjectFileGenerator* PlatformIntegrator::projectFileGenerator ( ) const

protectedpure virtual

Implemented in Stratix2DSPBoardIntegrator, Stratix3DevKitIntegrator, AvalonIntegrator, KoskiIntegrator, and AlmaIFIntegrator.

Referenced by addProGeFiles(), createMemories(), AlteraIntegrator::dmemInstance(), AlteraIntegrator::imemInstance(), AlteraIntegrator::integrateProcessor(), and writeNewToplevel().

◆ readLsuParameters()

MemInfo PlatformIntegrator::readLsuParameters ( const TTAMachine::FunctionUnit & lsu )

protected

Definition at line 403 of file PlatformIntegrator.cc.

                                                                        {
     
     MemInfo dmem;
     dmem.type = dmemType_;
     dmem.mauWidth = lsu.addressSpace()->width();
     unsigned int internalAddrw =
         MathTools::requiredBits(lsu.addressSpace()->end());
     unsigned int dataWidth = 0;
     for (int i = 0; i < lsu.operationPortCount(); i++) {
         TTAMachine::FUPort* port = lsu.operationPort(i);
         if (port->isInput() && !port->isTriggering()) {
             dataWidth = std::max((unsigned)port->width(), dataWidth);
         }
     }
     dmem.widthInMaus = static_cast<int>(
         ceil(static_cast<double>(dataWidth)/dmem.mauWidth));
      int bytemaskWidth = 0;
     if (dmem.widthInMaus > 1) {
         unsigned int maus = static_cast<unsigned int>(dmem.widthInMaus) - 1;
         bytemaskWidth = MathTools::requiredBits(maus);
     }
     dmem.portAddrw = internalAddrw - bytemaskWidth;
     unsigned long int lastAddr = lsu.addressSpace()->end();
     dmem.asAddrw = MathTools::requiredBits(lastAddr);
     dmem.asName = lsu.addressSpace()->name();
     dmem.lsuName = lsu.name();
     dmem.isShared = false;
     return dmem;
 }

References TTAMachine::FunctionUnit::addressSpace(), MemInfo::asAddrw, MemInfo::asName, dmemType_, TTAMachine::AddressSpace::end(), TTAMachine::Port::isInput(), MemInfo::isShared, TTAMachine::FUPort::isTriggering(), MemInfo::lsuName, MemInfo::mauWidth, TTAMachine::Component::name(), TTAMachine::FunctionUnit::operationPort(), TTAMachine::FunctionUnit::operationPortCount(), MemInfo::portAddrw, MathTools::requiredBits(), MemInfo::type, TTAMachine::BaseFUPort::width(), TTAMachine::AddressSpace::width(), and MemInfo::widthInMaus.

Referenced by AlmaIFIntegrator::findMemories(), and parseDataMemories().

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◆ resetPort()

ProGe::NetlistPort * PlatformIntegrator::resetPort ( ) const

Definition at line 704 of file PlatformIntegrator.cc.

                                     {
  
     if (resetPort_ == NULL) {
         TCEString msg;
         msg << "PlatformIntegrator was not initialized properly";
         throw ObjectNotInitialized(__FILE__, __LINE__, __func__, msg);
     }
     return resetPort_;
 }

References __func__, and resetPort_.

Referenced by XilinxBlockRamGenerator::addMemory(), MemoryGenerator::addMemory(), MemoryGenerator::corePortName(), AlmaIFIntegrator::initAlmaifBlock(), AlmaIFIntegrator::integrateCore(), and integrateCore().

◆ setDeviceFamily()

virtual void PlatformIntegrator::setDeviceFamily ( TCEString devFamily )

pure virtual

Set the FPGA device family.

Intended for TTA IP integration. Integrator can device whether this overrides the default device family.

Implemented in Stratix2DSPBoardIntegrator, Stratix3DevKitIntegrator, AlmaIFIntegrator, AvalonIntegrator, and KoskiIntegrator.

Referenced by ProGe::ProGeUI::integrateProcessor().

◆ setDeviceName()

void PlatformIntegrator::setDeviceName ( TCEString devName )

inline

Set or get the FPGA device name.

This is used for synthesis scripts by AlmaIFIntegrator and QuartusProjectGenerator.

Definition at line 113 of file PlatformIntegrator.hh.

113 { deviceName_ = devName; }

References deviceName_.

Referenced by ProGe::ProGeUI::integrateProcessor(), Stratix2DSPBoardIntegrator::Stratix2DSPBoardIntegrator(), and Stratix3DevKitIntegrator::Stratix3DevKitIntegrator().

◆ setSharedOutputDir()

void PlatformIntegrator::setSharedOutputDir ( const TCEString & sharedDir )

Set proge share output directory if it differs from ProGe output dir

Definition at line 169 of file PlatformIntegrator.cc.

                                                                  {
  
     if (FileSystem::absolutePathOf(sharedDir) != 
         FileSystem::absolutePathOf(progeOutputDir_)) {
         sharedOutputDir_ = sharedDir;
     }
 }

References FileSystem::absolutePathOf(), progeOutputDir_, and sharedOutputDir_.

Referenced by ProGe::ProGeUI::integrateProcessor().

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◆ targetClockFrequency()

int PlatformIntegrator::targetClockFrequency ( ) const

virtual

Returns the target clock frequency in MHz

Reimplemented in Stratix2DSPBoardIntegrator, Stratix3DevKitIntegrator, AlmaIFIntegrator, AvalonIntegrator, and KoskiIntegrator.

Definition at line 285 of file PlatformIntegrator.cc.

                                                {
  
     return targetFrequency_;
 }

References targetFrequency_.

Referenced by Stratix3DevKitIntegrator::targetClockFrequency(), Stratix2DSPBoardIntegrator::targetClockFrequency(), and QuartusProjectGenerator::writeQSFFile().

◆ toplevelBlock()

const ProGe::NetlistBlock & PlatformIntegrator::toplevelBlock ( ) const

Returns the platform integration toplevel netlist block

Definition at line 537 of file PlatformIntegrator.cc.

                                         {
     return *integratorBlock_;
 }

References integratorBlock_.

Referenced by IPXactFileGenerator::addBusInterfaces(), SOPCBuilderFileGenerator::countAvalonMMMasters(), SOPCBuilderFileGenerator::createInterfaces(), SOPCBuilderFileGenerator::writeGenerics(), and IPXactFileGenerator::writeProjectFiles().

◆ warningStream()

std::ostream & PlatformIntegrator::warningStream ( ) const

protected

Definition at line 271 of file PlatformIntegrator.cc.

                                         {
  
     return warningStream_;
 }

References warningStream_.

Referenced by Stratix3DevKitIntegrator::addSignalMapping(), Stratix2DSPBoardIntegrator::addSignalMapping(), AlteraIntegrator::dmemInstance(), KoskiIntegrator::dmemInstance(), AlmaIFIntegrator::dmemInstance(), Stratix2DSPBoardIntegrator::dmemInstance(), AlteraIntegrator::imemInstance(), AlmaIFIntegrator::imemInstance(), Stratix3DevKitIntegrator::setDeviceFamily(), and Stratix2DSPBoardIntegrator::setDeviceFamily().

◆ writeNewToplevel()

void PlatformIntegrator::writeNewToplevel ( )

protectedvirtual

Definition at line 609 of file PlatformIntegrator.cc.

                                      {
     
     ProGe::NetlistWriter* writer;
     if (hdl_ == ProGe::VHDL) {
         writer = new ProGe::VHDLNetlistWriter(*integratorBlock_);
     } else {
         assert(false);
     }
  
     TCEString platformDir = outputPath();
     writer->write(platformDir);
     delete writer;
  
     
     TCEString toplevelFile =
         outputFilePath(coreEntityName() + "_toplevel.vhdl");
     if (!FileSystem::fileExists(toplevelFile)) {
         TCEString msg = "NetlistWriter failed to create file " + toplevelFile;
         throw FileNotFound(__FILE__, __LINE__, "platformIntegrator", msg);
     }
     projectFileGenerator()->addHdlFile(toplevelFile);
  
     TCEString paramFile =
         outputFilePath(platformEntityName() + "_params_pkg.vhdl");
     if (FileSystem::fileExists(paramFile)) {
         projectFileGenerator()->addHdlFile(paramFile);
     }
 }

References ProjectFileGenerator::addHdlFile(), assert, coreEntityName(), FileSystem::fileExists(), hdl_, integratorBlock_, outputFilePath(), outputPath(), platformEntityName(), projectFileGenerator(), ProGe::VHDL, and ProGe::NetlistWriter::write().

Referenced by AlteraIntegrator::integrateProcessor(), AlmaIFIntegrator::integrateProcessor(), Stratix3DevKitIntegrator::integrateProcessor(), and Stratix2DSPBoardIntegrator::integrateProcessor().

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Member Data Documentation

◆ clkPort_

ProGe::NetlistPort* PlatformIntegrator::clkPort_

private

Definition at line 340 of file PlatformIntegrator.hh.

Referenced by clockPort(), and initPlatformNetlist().

◆ coreEntityName_

TCEString PlatformIntegrator::coreEntityName_

private

Definition at line 323 of file PlatformIntegrator.hh.

Referenced by coreEntityName().

◆ deviceName_

TCEString PlatformIntegrator::deviceName_

private

Definition at line 326 of file PlatformIntegrator.hh.

Referenced by deviceName(), and setDeviceName().

◆ dmem_

std::map<TTAMachine::AddressSpace*, MemInfo> PlatformIntegrator::dmem_

private

Definition at line 336 of file PlatformIntegrator.hh.

Referenced by clearDataMemories(), createMemories(), dmemCount(), dmemInfo(), and parseDataMemories().

◆ dmemType_

MemType PlatformIntegrator::dmemType_

private

Definition at line 335 of file PlatformIntegrator.hh.

Referenced by initPlatformNetlist(), and readLsuParameters().

◆ errorStream_

std::ostream& PlatformIntegrator::errorStream_

private

Definition at line 330 of file PlatformIntegrator.hh.

Referenced by errorStream().

◆ hdl_

ProGe::HDL PlatformIntegrator::hdl_

private

Definition at line 319 of file PlatformIntegrator.hh.

Referenced by writeNewToplevel().

◆ idf_

const IDF::MachineImplementation* PlatformIntegrator::idf_

private

Definition at line 315 of file PlatformIntegrator.hh.

Referenced by idf().

◆ imem_

MemInfo PlatformIntegrator::imem_

private

Definition at line 334 of file PlatformIntegrator.hh.

Referenced by createMemories(), imemInfo(), and PlatformIntegrator().

◆ integratorBlock_

ProGe::NetlistBlock* PlatformIntegrator::integratorBlock_

private

Definition at line 317 of file PlatformIntegrator.hh.

Referenced by copyProgeBlockToNetlist(), initPlatformNetlist(), integratorBlock(), PlatformIntegrator(), toplevelBlock(), writeNewToplevel(), and ~PlatformIntegrator().

◆ lsus_

std::vector<TTAMachine::FunctionUnit*> PlatformIntegrator::lsus_

private

Definition at line 338 of file PlatformIntegrator.hh.

Referenced by clearDataMemories(), createMemories(), and parseDataMemories().

◆ machine_

const TTAMachine::Machine* PlatformIntegrator::machine_

private

Definition at line 313 of file PlatformIntegrator.hh.

Referenced by machine(), and parseDataMemories().

◆ outputDir_

TCEString PlatformIntegrator::outputDir_

private

Definition at line 324 of file PlatformIntegrator.hh.

Referenced by createOutputDir(), outputFilePath(), and outputPath().

◆ progeOutputDir_

TCEString PlatformIntegrator::progeOutputDir_

private

Definition at line 321 of file PlatformIntegrator.hh.

Referenced by progeFilePath(), progeOutputHdlFiles(), and setSharedOutputDir().

◆ programName_

TCEString PlatformIntegrator::programName_

private

Definition at line 325 of file PlatformIntegrator.hh.

Referenced by programName().

◆ resetPort_

ProGe::NetlistPort* PlatformIntegrator::resetPort_

private

Definition at line 341 of file PlatformIntegrator.hh.

Referenced by initPlatformNetlist(), and resetPort().

◆ sharedOutputDir_

TCEString PlatformIntegrator::sharedOutputDir_

private

Definition at line 322 of file PlatformIntegrator.hh.

Referenced by progeOutputHdlFiles(), and setSharedOutputDir().

◆ targetFrequency_

int PlatformIntegrator::targetFrequency_

private

Definition at line 327 of file PlatformIntegrator.hh.

Referenced by targetClockFrequency().

◆ TTA_CORE_CLK

const TCEString PlatformIntegrator::TTA_CORE_CLK = "clk"

staticprotected

Definition at line 303 of file PlatformIntegrator.hh.

Referenced by initPlatformNetlist(), AlmaIFIntegrator::integrateCore(), and integrateCore().

◆ TTA_CORE_RSTX

const TCEString PlatformIntegrator::TTA_CORE_RSTX = "rstx"

staticprotected

Definition at line 304 of file PlatformIntegrator.hh.

Referenced by initPlatformNetlist(), AlmaIFIntegrator::integrateCore(), and integrateCore().

◆ ttaCores_

ProGe::NetlistBlock* PlatformIntegrator::ttaCores_

private

Definition at line 332 of file PlatformIntegrator.hh.

Referenced by copyProgeBlockToNetlist(), and progeBlock().

◆ unconnectedPorts_

std::multimap<TCEString, const ProGe::NetlistPort*>* PlatformIntegrator::unconnectedPorts_

private

Definition at line 343 of file PlatformIntegrator.hh.

◆ warningStream_

std::ostream& PlatformIntegrator::warningStream_

private

Definition at line 329 of file PlatformIntegrator.hh.

Referenced by warningStream().

The documentation for this class was generated from the following files:

Public Member Functions

Protected Member Functions

Static Protected Attributes

Private Member Functions

Private Attributes

Detailed Description

Constructor & Destructor Documentation

◆ PlatformIntegrator() [1/2]

◆ PlatformIntegrator() [2/2]

◆ ~PlatformIntegrator()

Member Function Documentation

◆ addProGeFiles()

◆ chopSignalToTag()

◆ chopTaggedSignals()

◆ clearDataMemories()

◆ clockPort()

◆ connectToplevelPort()

◆ copyProgeBlockToNetlist()

◆ coreEntityName()

◆ createMemories()

◆ createOutputDir()

◆ deviceFamily()

◆ deviceName()

◆ devicePackage()

◆ deviceSpeedClass()

◆ dmemCount()

◆ dmemInfo() [1/2]

◆ dmemInfo() [2/2]

◆ dmemInstance()

◆ errorStream()

◆ exportUnconnectedPorts()

◆ generateMemory()

◆ hasPinTag()

◆ idf()

◆ imemInfo()

◆ imemInstance()

◆ initPlatformNetlist()

◆ integrateCore()

◆ integrateProcessor()

◆ integratorBlock()

◆ loadFUExternalPorts()

◆ machine()

◆ outputFilePath()

◆ outputPath()

◆ parseDataMemories()

◆ pinTag()

◆ platformEntityName()

◆ printInfo()

◆ progeBlock()

◆ progeFilePath()

◆ progeOutputHdlFiles()

◆ programName()

◆ projectFileGenerator()

◆ readLsuParameters()

◆ resetPort()

◆ setDeviceFamily()

◆ setDeviceName()

◆ setSharedOutputDir()

◆ targetClockFrequency()

◆ toplevelBlock()

◆ warningStream()

◆ writeNewToplevel()

Member Data Documentation

◆ clkPort_

◆ coreEntityName_

◆ deviceName_

◆ dmem_

◆ dmemType_

◆ errorStream_

◆ hdl_

◆ idf_

◆ imem_

◆ integratorBlock_

◆ lsus_

◆ machine_

◆ outputDir_

◆ progeOutputDir_

◆ programName_

◆ resetPort_

◆ sharedOutputDir_