This is the home page of the Customized Parallel Computing (CPC) research group of Tampere University. Group's name in Finnish is Räätälöity rinnakkaislaskenta.
CPC's main research focus is on design and programming methodologies of customized parallel computing platforms and real time implementations of challenging algorithms.
In addition to publications and theses listed here, CPC has also made two major open source contributions: It leads the development of OpenASIP and Portable Computing Language (pocl).
An algorithm domain with extreme computational demands that CPC has been very interested in the past years is real time ray tracing. A separate focus group was formed for finding algorithmic, parallel/heterogeneous implementation and custom hardware solutions for its challenges in 2015. The group's web pages are here.
News and updates
August 24th, 2023: Final demonstrator video for the CPSoSAware EU project available
Check out the video of the final demonstrator for the CPSoSAware EU project. The work was a collaboration with the University of Peloponnese. The demonstrator features a nanodrone, which offloads processing to edge resources wirelessly using Pocl-R.
August 8th, 2023: Added a publication from 2022 missing from the web page
-
Topi Leppänen, Atro Lotvonen, Pekka Jääskeläinen:
"Cross-vendor programming abstraction for diverse heterogeneous platforms",
in Frontiers in Computer Science, Vol. 4, Oct. 2022 (download).
June 15th, 2023: Two new publications added
-
Topi Leppänen, Atro Lotvonen, Panagiotis Mousouliotis, Joonas Multanen, Georgios Keramidas, Pekka Jääskeläinen:
"Efficient OpenCL system integration of non-blocking FPGA accelerators",
in Microprocessors and Microsystems (MICPRO), Vol. 97, Mar. 2023 (download). -
Alex Hirvonen, Topi Leppänen, Kari Hepola, Joonas Multanen, Joost Hoozemans, Pekka Jääskeläinen:
"AEX: Automated High-Level Synthesis of Compiler Programmable Co-processors",
in Journal of Signal Processing Systems (JSPS), Feb. 2023 (download).
October 17th, 2022: A master's thesis and a new publication added
- Kari Hepola:
Generation of Customized RISC-V Implementations (2022) (link) -
Kanishkan Vadivel, Barry de Bruin, Pekka Jääskeläinen, Roel Jordans and Henk Corporaal:
"Prebypass: Software Register File Bypassing for Reduced Interconnection Architecture",
in Euromicro Conference on Digital Systems Design (DSD 2022) (download).
September 22nd, 2022: New publications added
- Jakub Žádník, Markku Mäkitalo, Pekka Jääskeläinen,
"Pruned Lightweight Encoders for Computer Vision",
IEEE 24th International Workshop on Multimedia Signal Processing (MMSP 2022) download poster -
Kari Hepola, Joonas Multanen and Pekka Jääskeläinen:
"Dual-IS: Instruction Set Modality for Efficient Instruction Level Parallelism",
in 35th GI/ITG International Conference on Architecture of Computing Systems (ARCS 2022) (download). -
Kari Hepola, Joonas Multanen and Pekka Jääskeläinen:
"OpenASIP 2.0: Co-Design Toolset for RISC-V Application-Specific Instruction-Set Processors",
in 33rd IEEE International Conference on Applicationspecific Systems, Architectures and Processors (ASAP 2022) (download).
February 16th, 2022: New publication added
-
Jakub Zadnik, Markku Mäkitalo, Jarno Vanne, Pekka Jääskeläinen:
"Image and Video Coding Techniques for Ultra-Low-Latency",
in ACM Computing Surveys (Volume 54, Issue 11s, January 2022) (download).