Previous: Software framework Up: MOVE framework Next: Optimizer

Hardware framework

 The hardware framework is responsible for the realization of a application specific, single chip MOVE processor. In figure the hardware framework is drawn as a box which accepts architecture parameter values, and a technology description as input and produces a VLSI layout (e.g. in CIF format) of the generated processor as output. Besides that, it interfaces directly, via the layour analyser, with the optimizer, to exchange information about area, speed and power consumption requirements.

The hardware framework uses a VLSI library of predesigned cells (at symbolic layout level) to generate a processor. These cells can either be standard cells used by standard cell routing tools, or user designed basic cells used for generating regular structures (like memories).