Subsections

1 Memory Related

Questions related to memory accessing.

1 Load Store Unit

In the LSU implementations shipped with TCE the two LSB bits are used by the LSU to control a so called write mask that handles writing of bytes. This means that the memory address outside the processor is 2 bits narrower than inside the processor. When you set the data address space width in ProDe, the width is the address width inside the processor.



Pekka Jääskeläinen 2016-11-24