OpenASIP  2.0
Protected Member Functions | Private Member Functions | List of all members
BlocksConnectIC Class Reference
Inheritance diagram for BlocksConnectIC:
Inheritance graph
Collaboration diagram for BlocksConnectIC:
Collaboration graph

Protected Member Functions

TTAMachine::SegmentcreateBus (TTAMachine::Machine *mach, int width)
 
- Protected Member Functions inherited from DesignSpaceExplorerPlugin
 DesignSpaceExplorerPlugin ()
 
void checkParameters () const
 
- Protected Member Functions inherited from DesignSpaceExplorer
TTAProgram::Programschedule (const std::string applicationFile, TTAMachine::Machine &machine, TCEString paramOptions="-O3")
 
const ExecutionTracesimulate (const TTAProgram::Program &program, const TTAMachine::Machine &machine, const TestApplication &testApplication, const ClockCycleCount &maxCycles, ClockCycleCount &runnedCycles, const bool tracing, const bool useCompiledSimulation=false, std::vector< ClockCycleCount > *executionCounts=NULL)
 

Private Member Functions

 PLUGIN_DESCRIPTION ("Arranges architecture FUs into a Blocks-like interconnection")
 
 BlocksConnectIC ()
 
virtual bool requiresStartingPointArchitecture () const
 
virtual bool producesArchitecture () const
 
virtual bool requiresHDB () const
 
virtual bool requiresSimulationData () const
 
virtual bool requiresApplication () const
 
virtual std::vector< RowIDexplore (const RowID &configurationID, const unsigned int &)
 

Additional Inherited Members

- Public Types inherited from DesignSpaceExplorerPlugin
typedef std::pair< std::string, ExplorerPluginParameterParameter
 
typedef std::map< std::string, ExplorerPluginParameterParameterMap
 
typedef std::map< std::string, ExplorerPluginParameter >::iterator PMIt
 
typedef std::map< std::string, ExplorerPluginParameter >::const_iterator PMCIt
 
- Public Member Functions inherited from DesignSpaceExplorerPlugin
virtual std::string description () const
 
void addParameter (TCEString name, ExplorerPluginParameterType type, bool compulsory=true, TCEString defaultValue="", TCEString description="")
 
template<typename T >
void readCompulsoryParameter (const std::string paramName, T &param) const
 
template<typename T >
void readOptionalParameter (const std::string paramName, T &param) const
 
template<typename RT >
RT parameterValue (const std::string &paramName) const
 
virtual ~DesignSpaceExplorerPlugin ()
 
virtual void giveParameter (const std::string &name, const std::string &value)
 
virtual std::string name () const
 
virtual void setPluginName (const std::string &pluginName)
 
virtual bool hasParameter (const std::string &paramName) const
 
ParameterMap parameters () const
 
virtual bool booleanValue (const std::string &parameter) const
 
- Public Member Functions inherited from DesignSpaceExplorer
 DesignSpaceExplorer ()
 
virtual ~DesignSpaceExplorer ()
 
virtual void setDSDB (DSDBManager &dsdb)
 
virtual bool evaluate (const DSDBManager::MachineConfiguration &configuration, CostEstimates &results=dummyEstimate_, bool estimate=false)
 
virtual DSDBManagerdb ()
 
std::vector< DesignSpaceExplorerPlugin * > getPlugins ()
 
RowID createImplementationAndStore (const DSDBManager::MachineConfiguration &conf, const double &frequency=0.0, const double &maxArea=0.0, const bool &createEstimates=true, const std::string &icDec="DefaultICDecoder", const std::string &icDecHDB="asic_130nm_1.5V.hdb")
 
bool createImplementation (const DSDBManager::MachineConfiguration &conf, DSDBManager::MachineConfiguration &newConf, const double &frequency=0.0, const double &maxArea=0.0, const bool &createEstimates=true, const std::string &icDec="DefaultICDecoder", const std::string &icDecHDB="asic_130nm_1.5V.hdb")
 
IDF::MachineImplementationselectComponents (const TTAMachine::Machine &mach, const double &frequency=0.0, const double &maxArea=0.0, const std::string &icDec="DefaultICDecoder", const std::string &icDecHDB="asic_130nm_1.5V.hdb") const
 
void createEstimateData (const TTAMachine::Machine &mach, const IDF::MachineImplementation &idf, CostEstimator::AreaInGates &area, CostEstimator::DelayInNanoSeconds &longestPathDelay)
 
RowID addConfToDSDB (const DSDBManager::MachineConfiguration &conf)
 
- Static Public Member Functions inherited from DesignSpaceExplorer
static DesignSpaceExplorerPluginloadExplorerPlugin (const std::string &pluginName, DSDBManager *dsdb=NULL)
 
- Protected Attributes inherited from DesignSpaceExplorerPlugin
std::string pluginName_
 the name of the explorer plugin More...
 
ParameterMap parameters_
 Parameters for the plugin. More...
 

Detailed Description

Definition at line 51 of file BlocksConnectIC.cc.

Constructor & Destructor Documentation

◆ BlocksConnectIC()

BlocksConnectIC::BlocksConnectIC ( )
inlineprivate

Definition at line 55 of file BlocksConnectIC.cc.

Member Function Documentation

◆ createBus()

TTAMachine::Segment* BlocksConnectIC::createBus ( TTAMachine::Machine mach,
int  width 
)
inlineprotected

Creates a bus with specified bit width.

Parameters
machMachine for that bus.
widthBit width of a bus.
Returns
Bus segment.

Definition at line 263 of file BlocksConnectIC.cc.

263  {
264  int idx = mach->busNavigator().count();
265  TCEString busName = "B" + Conversion::toString(idx);
266  Bus* newBus = new Bus(busName, width, 0, Machine::SIGN);
267  TTAMachine::Segment* newSegment =
268  new TTAMachine::Segment(busName, *newBus);
269  mach->addBus(*newBus);
270  return newSegment;
271  }

References TTAMachine::Machine::addBus(), TTAMachine::Machine::busNavigator(), TTAMachine::Machine::Navigator< ComponentType >::count(), TTAMachine::Machine::SIGN, and Conversion::toString().

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◆ explore()

virtual std::vector<RowID> BlocksConnectIC::explore ( const RowID configurationID,
const unsigned int &   
)
inlineprivatevirtual

Arranges architecture FUs into a Blocks-like interconnection. This is typically as baseline for running the BusMergeMinimizer and RFPortMergeMinimizer plugins. Reference: Blocks, a reconfigurable architecture combining energy efficiency and flexibility. Wijtvliet, M. (2020). Technische Universiteit Eindhoven.

Reimplemented from DesignSpaceExplorerPlugin.

Definition at line 88 of file BlocksConnectIC.cc.

88  {
89  std::vector<RowID> result;
90 
91  DSDBManager& dsdb = db();
93  conf.hasImplementation = false;
94  TTAMachine::Machine* mach = NULL;
95 
96  // load the adf from file or from dsdb
97  try {
98  conf = dsdb.configuration(configurationID);
99  mach = dsdb.architecture(conf.architectureID);
100  } catch (const Exception& e) {
101  std::ostringstream msg(std::ostringstream::out);
103  << "Error loading the adf." << std::endl;
104  return result;
105  }
106  assert(mach != NULL);
107 
108  // Remove unconnected sockets
110  mach->socketNavigator();
111  for (int i = 0; i < socketNavi.count(); i++) {
112  if (socketNavi.item(i)->portCount() == 0) {
113  mach->removeSocket(*socketNavi.item(i));
114  i--;
115  }
116  }
117 
118  // Wiping buses also destroys socket directions (input/output)
119  // and there seems to be no other way to find out whether a port
120  // is input or output.
121  // Save the directions before wiping the buses
122  for (int i = 0; i < socketNavi.count(); i++) {
123  Socket* sock = socketNavi.item(i);
124  // Restrict to 32-bit bus
125  int width = sock->port(0)->width();
126  assert(width == 32 && "ADF has Socket != 32-bit");
127  }
128 
129  // save directions and sockets
130  std::vector<Socket::Direction> directions;
131  std::vector<int> readSockets, writeSockets;
132  int gcu_ra_input = -1, gcu_ra_output = -1, gcu_pc = -1;
133 
134  for (int i = 0; i < socketNavi.count(); i++) {
135  Socket* sock = socketNavi.item(i);
136  Socket::Direction dir = sock->direction();
137  directions.push_back(dir);
138 
139  // Allow only 2-output buffers at max
140  int port_count = sock->portCount();
141  assert(
142  port_count > 0 && port_count <= 2 &&
143  "Socket is not connected or connected to more than 2 FUs");
144  // Separate GCU RA socket for special handling
145  Unit* parentUnit = sock->port(0)->parentUnit();
146  ControlUnit* gcu = dynamic_cast<ControlUnit*>(parentUnit);
147  if (dir == Socket::INPUT) {
148  if (gcu != NULL && sock->port(0)->name() == "ra") {
149  gcu_ra_input = i;
150  } else {
151  readSockets.push_back(i);
152  }
153  } else {
154  writeSockets.push_back(i);
155  if (gcu != NULL && sock->port(0)->name() == "ra") {
156  gcu_ra_output = i;
157  }
158  }
159  }
160 
161  // Wipe all existing buses
163  for (int i = 0; i < busNavi.count(); i++) {
164  mach->removeBus(*busNavi.item(i));
165  i--;
166  }
167 
168  // Add new bus for each input port (i.e. We mux the 4xinput via single
169  // bus)
170  int busCount = 0;
171  std::vector<int> readBuses, writeBuses;
172 
173  /* initialize random seed: */
174  std::srand(time(NULL));
175  for (unsigned int i = 0; i < readSockets.size(); i++) {
176  int rd_soc_idx = readSockets[i];
177  Socket* input_sock = socketNavi.item(rd_soc_idx);
178 
179  // Attach 32-bit bus segment
180  TTAMachine::Segment* newSegment = createBus(mach, 32);
181  newSegment->attachSocket(*input_sock);
182  input_sock->setDirection(directions[rd_soc_idx]);
183  // Handle special case for GCU
184  Unit* parentUnit = input_sock->port(0)->parentUnit();
185  if (dynamic_cast<ControlUnit*>(parentUnit) != NULL &&
186  input_sock->port(0)->name() == "pc") {
187  assert(gcu_ra_input != -1);
188  Socket* ra_sock = socketNavi.item(gcu_ra_input);
189  newSegment->attachSocket(*ra_sock);
190  ra_sock->setDirection(directions[gcu_ra_input]);
191  gcu_pc = rd_soc_idx;
192  }
193  readBuses.push_back(busCount++);
194 
195  // Make connections to the socket (maximum 4 connections)
196  int output_socket_count = writeSockets.size();
197  int req_connections = std::min(output_socket_count, 4);
198  while (req_connections > 0) {
199  // Select random FU output port
200  int wr_soc_idx =
201  writeSockets[std::rand() % writeSockets.size()];
202  Socket* output_sock = socketNavi.item(wr_soc_idx);
203 
204  // Check if we already have connections
205  if (newSegment->isConnectedTo(*output_sock)) {
206  continue;
207  }
208 
209  // No connections to this port yet; make connection
210  newSegment->attachSocket(*output_sock);
211  output_sock->setDirection(directions[wr_soc_idx]);
212  req_connections--;
213  }
214  }
215 
216  // Create instruction template for imm unit
217  if (mach->immediateUnitNavigator().count() != 0) {
218  ImmediateUnit* immu = mach->immediateUnitNavigator().item(0);
219 
220  while (mach->instructionTemplateNavigator().count() > 0) {
222  *mach->instructionTemplateNavigator().item(0));
223  }
224 
225  new InstructionTemplate("no_limm", *mach);
226 
227  InstructionTemplate* limm =
228  new InstructionTemplate("limm", *mach);
229  TTAMachine::Segment* newSegment = createBus(mach, 32);
230  Bus* newBus = newSegment->parentBus();
231 
232  limm->addSlot(newBus->name(), 32, *immu);
233 
234  // Attch GCU's RA and PC sockets (We do not have explicit RA port
235  // in Blocks; so, this is just to emulate the effect of single
236  // port.)
237  assert(gcu_ra_input != -1);
238  newSegment->attachSocket(*socketNavi.item(gcu_ra_input));
239  assert(gcu_ra_output != -1);
240  newSegment->attachSocket(*socketNavi.item(gcu_ra_output));
241  assert(gcu_pc != -1);
242  newSegment->attachSocket(*socketNavi.item(gcu_pc));
243  }
244 
245  // add machine to configuration
246  conf.architectureID = dsdb.addArchitecture(*mach);
247 
248  // add new configuration to dsdb
249  RowID confID = dsdb.addConfiguration(conf);
250  result.push_back(confID);
251  return result;
252  }

References DSDBManager::addArchitecture(), DSDBManager::addConfiguration(), TTAMachine::InstructionTemplate::addSlot(), DSDBManager::architecture(), DSDBManager::MachineConfiguration::architectureID, assert, TTAMachine::Segment::attachSocket(), TTAMachine::Machine::busNavigator(), DSDBManager::configuration(), TTAMachine::Machine::Navigator< ComponentType >::count(), TTAMachine::Machine::deleteInstructionTemplate(), TTAMachine::Socket::direction(), Application::errorStream(), DSDBManager::MachineConfiguration::hasImplementation, TTAMachine::Machine::immediateUnitNavigator(), TTAMachine::Socket::INPUT, TTAMachine::Machine::instructionTemplateNavigator(), TTAMachine::Segment::isConnectedTo(), TTAMachine::Machine::Navigator< ComponentType >::item(), TTAMachine::Port::name(), TTAMachine::Component::name(), TTAMachine::Segment::parentBus(), TTAMachine::Port::parentUnit(), TTAMachine::Socket::port(), TTAMachine::Socket::portCount(), TTAMachine::Machine::removeBus(), TTAMachine::Machine::removeSocket(), TTAMachine::Socket::setDirection(), TTAMachine::Machine::socketNavigator(), and TTAMachine::Port::width().

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◆ PLUGIN_DESCRIPTION()

BlocksConnectIC::PLUGIN_DESCRIPTION ( "Arranges architecture FUs into a Blocks-like interconnection"  )
private

◆ producesArchitecture()

virtual bool BlocksConnectIC::producesArchitecture ( ) const
inlineprivatevirtual

Implements DesignSpaceExplorerPlugin.

Definition at line 62 of file BlocksConnectIC.cc.

62  {
63  return true;
64  }

◆ requiresApplication()

virtual bool BlocksConnectIC::requiresApplication ( ) const
inlineprivatevirtual

Reimplemented from DesignSpaceExplorerPlugin.

Definition at line 74 of file BlocksConnectIC.cc.

74  {
75  return false;
76  }

◆ requiresHDB()

virtual bool BlocksConnectIC::requiresHDB ( ) const
inlineprivatevirtual

Implements DesignSpaceExplorerPlugin.

Definition at line 66 of file BlocksConnectIC.cc.

66  {
67  return false;
68  }

◆ requiresSimulationData()

virtual bool BlocksConnectIC::requiresSimulationData ( ) const
inlineprivatevirtual

Implements DesignSpaceExplorerPlugin.

Definition at line 70 of file BlocksConnectIC.cc.

70  {
71  return false;
72  }

◆ requiresStartingPointArchitecture()

virtual bool BlocksConnectIC::requiresStartingPointArchitecture ( ) const
inlineprivatevirtual

Implements DesignSpaceExplorerPlugin.

Definition at line 58 of file BlocksConnectIC.cc.

58  {
59  return true;
60  }

The documentation for this class was generated from the following file:
TTAMachine::Segment::attachSocket
void attachSocket(Socket &socket)
Definition: Segment.cc:180
TTAMachine::Socket::portCount
int portCount() const
TTAMachine::Socket::port
Port * port(int index) const
Definition: Socket.cc:266
TTAMachine::Machine::deleteInstructionTemplate
virtual void deleteInstructionTemplate(InstructionTemplate &instrTempl)
Definition: Machine.cc:599
TTAMachine::Component::name
virtual TCEString name() const
Definition: MachinePart.cc:125
DesignSpaceExplorer::db
virtual DSDBManager & db()
Definition: DesignSpaceExplorer.cc:300
DSDBManager::architecture
TTAMachine::Machine * architecture(RowID id) const
Definition: DSDBManager.cc:807
TTAMachine::Segment
Definition: Segment.hh:54
DSDBManager::MachineConfiguration::hasImplementation
bool hasImplementation
Definition: DSDBManager.hh:80
TTAMachine::Bus
Definition: Bus.hh:53
TTAMachine::InstructionTemplate::addSlot
virtual void addSlot(const std::string &slotName, int width, ImmediateUnit &dstUnit)
Definition: InstructionTemplate.cc:169
TTAMachine::Port::width
virtual int width() const =0
TTAMachine::Machine::removeBus
virtual void removeBus(Bus &bus)
Definition: Machine.cc:477
RowID
int RowID
Type definition of row ID in relational databases.
Definition: DBTypes.hh:37
DesignSpaceExplorerPlugin::DesignSpaceExplorerPlugin
DesignSpaceExplorerPlugin()
Definition: DesignSpaceExplorerPlugin.cc:48
TTAMachine::Socket::Direction
Direction
Definition: Socket.hh:58
TTAMachine::Machine::Navigator::count
int count() const
TTAMachine::Socket::direction
Direction direction() const
Conversion::toString
static std::string toString(const T &source)
TTAMachine::InstructionTemplate
Definition: InstructionTemplate.hh:49
assert
#define assert(condition)
Definition: Application.hh:86
DSDBManager::MachineConfiguration
Definition: DSDBManager.hh:78
TTAMachine::Unit
Definition: Unit.hh:51
TTAMachine::Machine::immediateUnitNavigator
virtual ImmediateUnitNavigator immediateUnitNavigator() const
Definition: Machine.cc:416
TTAMachine::ControlUnit
Definition: ControlUnit.hh:50
TTAMachine::Segment::parentBus
Bus * parentBus() const
TTAMachine::Socket
Definition: Socket.hh:53
BlocksConnectIC::createBus
TTAMachine::Segment * createBus(TTAMachine::Machine *mach, int width)
Definition: BlocksConnectIC.cc:263
TTAMachine::Segment::isConnectedTo
bool isConnectedTo(const Socket &socket) const
Definition: Segment.cc:274
Exception
Definition: Exception.hh:54
DSDBManager
Definition: DSDBManager.hh:76
TTAMachine::Machine::socketNavigator
virtual SocketNavigator socketNavigator() const
Definition: Machine.cc:368
TTAMachine::Socket::setDirection
void setDirection(Direction direction)
Definition: Socket.cc:130
TTAMachine::Machine::addBus
virtual void addBus(Bus &bus)
Definition: Machine.cc:139
DSDBManager::addConfiguration
RowID addConfiguration(const MachineConfiguration &conf)
Definition: DSDBManager.cc:299
DSDBManager::addArchitecture
RowID addArchitecture(const TTAMachine::Machine &mom)
Definition: DSDBManager.cc:191
DSDBManager::configuration
MachineConfiguration configuration(RowID id) const
Definition: DSDBManager.cc:361
Application::errorStream
static std::ostream & errorStream()
Definition: Application.cc:171
TTAMachine::Port::name
virtual std::string name() const
Definition: Port.cc:141
TCEString
Definition: TCEString.hh:53
TTAMachine::Machine::busNavigator
virtual BusNavigator busNavigator() const
Definition: Machine.cc:356
TTAMachine::Machine::removeSocket
virtual void removeSocket(Socket &socket)
Definition: Machine.cc:490
TTAMachine::Machine::Navigator::item
ComponentType * item(int index) const
TTAMachine::Machine::instructionTemplateNavigator
virtual InstructionTemplateNavigator instructionTemplateNavigator() const
Definition: Machine.cc:428
DSDBManager::MachineConfiguration::architectureID
RowID architectureID
Definition: DSDBManager.hh:79
TTAMachine::Machine::Navigator
Definition: Machine.hh:186
TTAMachine::Machine
Definition: Machine.hh:73
TTAMachine::Port::parentUnit
Unit * parentUnit() const
TTAMachine::ImmediateUnit
Definition: ImmediateUnit.hh:50