OpenASIP  2.0
NetlistFactories.cc
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1 /*
2  Copyright (c) 2002-2015 Tampere University.
3 
4  This file is part of TTA-Based Codesign Environment (TCE).
5 
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23  */
24 /*
25  * @file NetlistFactories.cc
26  *
27  * Implementation of NetlistFactories class.
28  *
29  * Created on: 25.5.2015
30  * @author Henry Linjamäki 2015 (henry.linjamaki-no.spam-tut.fi)
31  * @note rating: red
32  */
33 
34 #include "NetlistFactories.hh"
35 
36 #include "NetlistPort.hh"
37 #include "NetlistPortGroup.hh"
38 #include "ProGeTypes.hh"
39 
40 #include "AssocTools.hh"
41 
42 namespace ProGe {
43 
44 PortFactory* PortFactory::instance_ = NULL;
47 
49 // : machine_(NULL),
50 // implementation_(NULL)
51 {}
52 
54  const TTAMachine::Machine& /*machine*/,
55  const IDF::MachineImplementation& /*impl*/)
56 // : machine_(&machine),
57 // implementation_(&impl)
58 {}
59 
61  PortPrototypeContainer::iterator port_it = portPrototypes_.begin();
62  while (port_it != portPrototypes_.end()) {
63  delete port_it->second;
64  port_it->second = NULL;
65  port_it++;
66  }
67  PortGroupPrototypeContainer::iterator portGroup_it =
68  portGroupPrototypes_.begin();
69  while (portGroup_it != portGroupPrototypes_.end()) {
70  delete portGroup_it->second;
71  portGroup_it->second = NULL;
72  portGroup_it++;
73  }
74 }
75 
76 void
79  portPrototypes_.insert(std::make_pair(type, port));
80 }
81 
82 void
85  registerPort(port->assignedSignal().type(), port);
86 }
87 
88 void
93 }
94 
95 void
97  SignalGroupType type, const NetlistPortGroup* portGroup) {
99  portGroupPrototypes_.insert(std::make_pair(type, portGroup));
100 }
101 
102 void
104  assert(
105  portGroup->assignedSignalGroup().type() !=
107 
108  registerPortGroup(portGroup->assignedSignalGroup().type(), portGroup);
109 }
110 
111 void
115  new OutBitPort(
117  new OutPort(
118  "imem_addr", "IMEMADDRWIDTH", BIT_VECTOR,
120  new InPort(
121  "imem_data", "IMEMWIDTHINMAUS*IMEMMAUWIDTH", BIT_VECTOR,
123  new InBitPort("busy", Signal(SignalType::STALL))));
124 }
125 
126 /**
127  * Creates new NetlistPort for the given signal type.
128  *
129  * @param type The signal type.
130  * @return Pointer to newly created NetlistPort. Returns nullptr if there is
131  * no prototype for the given signal type.
132  */
135  if (portPrototypes_.count(type)) {
136  NetlistPort* found = portPrototypes_.find(type)->second->clone();
137  if (found->direction() != direction) {
138  return NetlistTools::mirror(found);
139  } else {
140  return found;
141  }
142  }
143  return NULL;
144 }
145 
148  return instance()->createPort(type, direction);
149 }
150 
153  if (portGroupPrototypes_.count(type)) {
154  return portGroupPrototypes_.find(type)->second->clone();
155  }
156  return NULL;
157 }
158 
161  return instance()->createPortGroup(type);
162 }
163 
164 /**
165  * Initializes factory context for the singleton factory. This function may
166  * be called only once.
167  */
168 void
171  const IDF::MachineImplementation& impl) {
172  assert(
173  staticMachine_ == NULL && staticImplementation_ == NULL &&
174  "Attempted to initialize twice.");
176  staticImplementation_ = &impl;
177 }
178 
179 /**
180  * Global access to the factory as singleton. initializeContext() must be
181  * called once before this.
182  */
185  if (instance_) {
186  return instance_;
187  } else {
188  assert(staticMachine_ != NULL && staticImplementation_ != NULL);
189  return (
190  instance_ =
192  }
193 }
194 
195 /**
196  * Creates default clock port.
197  *
198  */
201  static const InBitPort clkPortPrototype("clk", Signal(SignalType::CLOCK));
202  return clkPortPrototype.clone(direction != IN);
203 }
204 
205 /**
206  * Creates default active-low reset port.
207  */
210  static const InBitPort rstxPortPrototype(
212  return rstxPortPrototype.clone(direction != IN);
213 }
214 
215 } /* namespace ProGe */
NetlistFactories.hh
ProGe::SignalType::FETCHBLOCK
@ FETCHBLOCK
Signal is TTA instruction block block containing (compressed) instruction.
machine
TTAMachine::Machine * machine
the architecture definition of the estimated processor
Definition: EstimatorCmdLineUI.cc:59
ProGe::BIT_VECTOR
@ BIT_VECTOR
Several bits.
Definition: ProGeTypes.hh:48
ProGe::PortFactory::resetPort
static NetlistPort * resetPort(Direction direction=IN)
Definition: NetlistFactories.cc:209
ProGe::PortFactory::createPort
NetlistPort * createPort(SignalType type, Direction direction=IN) const
Definition: NetlistFactories.cc:134
AssocTools::containsKey
static bool containsKey(const ContainerType &aContainer, const KeyType &aKey)
ProGe::SignalType::RESET
@ RESET
Reset signal.
ProGe::OutBitPort
Convenience class for output bit ports.
Definition: NetlistPort.hh:181
ProGe::NetlistPort::direction
Direction direction() const
Definition: NetlistPort.cc:373
ProGe::PortFactory::registerPortGroups
void registerPortGroups()
Definition: NetlistFactories.cc:112
ProGe::SignalType::UNDEFINED
@ UNDEFINED
Signal does not have specified usage.
ProGe::PortFactory::initializeContext
static void initializeContext(const TTAMachine::Machine &machine, const IDF::MachineImplementation &impl)
Definition: NetlistFactories.cc:169
ProGe::PortFactory::~PortFactory
virtual ~PortFactory()
Definition: NetlistFactories.cc:60
ProGe::SignalGroupType::INSTRUCTION_LINE
@ INSTRUCTION_LINE
Signal group type for serial TTA instruction bus.
NetlistPortGroup.hh
ProGe::SignalGroup
Definition: SignalGroup.hh:48
assert
#define assert(condition)
Definition: Application.hh:86
ProGe::ActiveState::LOW
@ LOW
ProGe::NetlistPortGroup
Definition: NetlistPortGroup.hh:53
ProGe::PortFactory::staticMachine_
static const TTAMachine::Machine * staticMachine_
The creation context for singleton instance.
Definition: NetlistFactories.hh:104
ProGe::SignalType::STALL
@ STALL
Signal to stopping destination device.
ProGe::InPort
Convenience class for input ports.
Definition: NetlistPort.hh:193
ProGe::PortFactory::portPrototypes_
PortPrototypeContainer portPrototypes_
The creation context.
Definition: NetlistFactories.hh:97
ProGe::PortFactory::instance
static PortFactory * instance()
Definition: NetlistFactories.cc:184
ProGe::PortFactory::PortFactory
PortFactory()
Definition: NetlistFactories.cc:48
NetlistPort.hh
ProGe::PortFactory::staticImplementation_
static const IDF::MachineImplementation * staticImplementation_
The creation context for singleton instance.
Definition: NetlistFactories.hh:106
ProGe::PortFactory::registerPortGroup
void registerPortGroup(SignalGroupType type, const NetlistPortGroup *portGroup)
Definition: NetlistFactories.cc:96
ProGe::SignalType::ADDRESS
@ ADDRESS
Signal holds address.
ProGe::SignalType::CLOCK
@ CLOCK
Clock signal.
ProGe::SignalGroupType::UNDEFINED
@ UNDEFINED
ProGeTypes.hh
ProGe::NetlistPort::clone
virtual NetlistPort * clone(bool asMirrored=false) const
Definition: NetlistPort.cc:258
ProGe::NetlistPortGroup::assignedSignalGroup
SignalGroup assignedSignalGroup() const
Definition: NetlistPortGroup.cc:160
ProGe::PortFactory::clockPort
static NetlistPort * clockPort(Direction direction=IN)
Definition: NetlistFactories.cc:200
ProGe::SignalType
SignalType
Definition: SignalTypes.hh:42
ProGe::SignalType::READ_REQUEST
@ READ_REQUEST
Signal to make read request.
ProGe::PortFactory::registerPorts
void registerPorts()
Definition: NetlistFactories.cc:89
ProGe::PortFactory
Definition: NetlistFactories.hh:55
ProGe::PortFactory::instance_
static PortFactory * instance_
Singleton instance of the factory.
Definition: NetlistFactories.hh:102
ProGe::Signal::type
SignalType type() const
Definition: Signal.cc:55
ProGe::PortFactory::createPortGroup
NetlistPortGroup * createPortGroup(SignalGroupType type) const
Definition: NetlistFactories.cc:152
ProGe
Definition: FUGen.hh:54
AssocTools.hh
ProGe::NetlistTools::mirror
static Direction mirror(Direction direction)
Definition: NetlistTools.cc:202
ProGe::PortFactory::create
static NetlistPort * create(SignalType type, Direction direction=IN)
Definition: NetlistFactories.cc:147
ProGe::PortFactory::portGroupPrototypes_
PortGroupPrototypeContainer portGroupPrototypes_
Registered NetlistPortGroup prototypes.
Definition: NetlistFactories.hh:99
ProGe::NetlistPort
Definition: NetlistPort.hh:70
ProGe::NetlistPort::assignedSignal
Signal assignedSignal() const
Definition: NetlistPort.cc:455
ProGe::SignalGroup::type
SignalGroupType type() const
Definition: SignalGroup.cc:43
ProGe::SignalGroupType
SignalGroupType
Definition: SignalGroupTypes.hh:43
ProGe::Signal
Definition: Signal.hh:46
ProGe::Direction
Direction
Direction of the port.
Definition: ProGeTypes.hh:52
ProGe::InBitPort
Convenience class for input bit ports.
Definition: NetlistPort.hh:216
ProGe::OutPort
Convenience class for output ports.
Definition: NetlistPort.hh:158
ProGe::IN
@ IN
Input port.
Definition: ProGeTypes.hh:53
IDF::MachineImplementation
Definition: MachineImplementation.hh:54
TTAMachine::Machine
Definition: Machine.hh:73
ProGe::PortFactory::registerPort
void registerPort(SignalType, const NetlistPort *port)
Definition: NetlistFactories.cc:77