OpenASIP  2.0
SinglePortByteMaskSSRAMBlock.hh
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2  Copyright (c) 2002-2015 Tampere University.
3 
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24 /*
25  * @file SinglePortByteMaskSSRAMBlock.hh
26  *
27  * Declaration of SinglePortByteMaskSSRAMBlock class.
28  *
29  * Created on: 8.9.2015
30  * @author Henry Linjam�ki 2015 (henry.linjamaki-no.spam-tut.fi)
31  * @note rating: red
32  */
33 
34 #ifndef SinglePortByteMaskSSRAMBlock_HH
35 #define SinglePortByteMaskSSRAMBlock_HH
36 
37 #include <string>
38 
39 #include "BaseNetlistBlock.hh"
40 
41 namespace ProGe {
42 
43 /*
44  * Netlist block of single port synchronous SRAM with byte mask.
45  */
47 public:
50  const std::string& addressWidth,
51  const std::string& dataWidth,
52  const std::string& initFile,
53  bool isForSimulation = true);
55 
56  void setAccessTraceFile(const std::string filename);
57  const NetlistPortGroup& memoryPort() const;
58 
59  virtual void write(
60  const Path& targetBaseDir, HDL targetLang = VHDL) const override;
61 
62 private:
63 
65 
66  bool isForSimulation_ = true;
67 };
68 
69 } /* namespace ProGe */
70 
71 #endif /* SinglePortByteMaskSSRAMBlock_HH */
ProGe::BaseNetlistBlock
Definition: BaseNetlistBlock.hh:59
Path
Definition: FileSystem.hh:197
ProGe::NetlistPortGroup
Definition: NetlistPortGroup.hh:53
ProGe::VHDL
@ VHDL
VHDL.
Definition: ProGeTypes.hh:41
ProGe::SinglePortByteMaskSSRAMBlock::memoryPort
const NetlistPortGroup & memoryPort() const
Definition: SinglePortByteMaskSSRAMBlock.cc:103
ProGe::SinglePortByteMaskSSRAMBlock::SinglePortByteMaskSSRAMBlock
SinglePortByteMaskSSRAMBlock()=delete
ProGe::SinglePortByteMaskSSRAMBlock::setAccessTraceFile
void setAccessTraceFile(const std::string filename)
Definition: SinglePortByteMaskSSRAMBlock.cc:97
ProGe::SinglePortByteMaskSSRAMBlock::isForSimulation_
bool isForSimulation_
Definition: SinglePortByteMaskSSRAMBlock.hh:66
ProGe
Definition: FUGen.hh:54
BaseNetlistBlock.hh
ProGe::HDL
HDL
HDLs supported by ProGe.
Definition: ProGeTypes.hh:40
ProGe::SinglePortByteMaskSSRAMBlock::memoryPortGroup_
NetlistPortGroup * memoryPortGroup_
Definition: SinglePortByteMaskSSRAMBlock.hh:64
ProGe::SinglePortByteMaskSSRAMBlock::write
virtual void write(const Path &targetBaseDir, HDL targetLang=VHDL) const override
Definition: SinglePortByteMaskSSRAMBlock.cc:109
ProGe::SinglePortByteMaskSSRAMBlock
Definition: SinglePortByteMaskSSRAMBlock.hh:46
ProGe::SinglePortByteMaskSSRAMBlock::~SinglePortByteMaskSSRAMBlock
virtual ~SinglePortByteMaskSSRAMBlock()
Definition: SinglePortByteMaskSSRAMBlock.cc:91