#include <LoopBufferBlock.hh>

Inheritance diagram for ProGe::LoopBufferBlock:

Collaboration diagram for ProGe::LoopBufferBlock:

Public Member Functions
	LoopBufferBlock ()=delete

	LoopBufferBlock (const ProGeContext &context, BaseNetlistBlock *parent=nullptr)

virtual	~LoopBufferBlock ()

void	setBlockWidthParameter (const std::string value)

void	setBufferSizeParameter (const std::string value)

void	setIterationPortWidthParameter (const std::string value)

void	setCoreIdParameter (const std::string value)

void	setUsageTracingParameter (bool setting)

const NetlistPort &	lockReqPortIn () const

const NetlistPort &	lockReqPortOut () const

const NetlistPort &	lockPortIn () const

const NetlistPort &	lockPortOut () const

const NetlistPort &	instructionPortIn () const

const NetlistPort &	instructionPortOut () const

const NetlistPort &	startPortIn () const

const NetlistPort *	stopPortIn () const

const NetlistPort &	loopBodySizePortIn () const

const NetlistPort *	loopIterationPortIn () const

const NetlistPort &	lenCntrPortOut () const

const NetlistPort &	loopFromImemPortOut () const

virtual void	write (const Path &targetBaseDir, HDL targetLang=VHDL) const override

Public Member Functions inherited from ProGe::BaseNetlistBlock
	BaseNetlistBlock ()

	BaseNetlistBlock (BaseNetlistBlock *parent)

	BaseNetlistBlock (const std::string &moduleName, const std::string &instanceName, BaseNetlistBlock *parent=nullptr)

virtual	~BaseNetlistBlock ()

const std::string &	instanceName () const

void	setInstanceName (const std::string &name)

const std::string &	moduleName () const

const std::string	name () const

virtual size_t	subBlockCount () const

virtual const BaseNetlistBlock &	subBlock (size_t index) const

virtual bool	hasSubBlock (const std::string &instanceName) const

virtual bool	isSubBlock (const BaseNetlistBlock &block) const

virtual bool	hasParameter (const std::string &name) const

virtual const Parameter &	parameter (const std::string &name) const

virtual size_t	parameterCount () const

virtual const Parameter &	parameter (size_t index) const

virtual size_t	portCount () const

virtual const NetlistPort &	port (size_t index) const

virtual std::vector< const NetlistPort * >	portsBy (SignalType type) const

virtual const NetlistPort &	portBy (SignalType type, size_t index=0) const

virtual bool	hasPortsBy (SignalType type) const

virtual const NetlistPort *	port (const std::string &portName, bool partialMatch=true) const

virtual size_t	portGroupCount () const

virtual const NetlistPortGroup &	portGroup (size_t index) const

virtual std::vector< const NetlistPortGroup * >	portGroupsBy (SignalGroupType type) const

virtual const Netlist &	netlist () const

virtual bool	hasParentBlock () const

virtual const BaseNetlistBlock &	parentBlock () const

virtual bool	isVirtual () const

virtual void	build () override

virtual void	connect () override

virtual void	finalize () override

virtual void	writeSelf (const Path &targetBaseDir, HDL targetLang=VHDL) const

virtual size_t	packageCount () const

virtual const std::string &	package (size_t idx) const

PortContainerType &	ports ()

virtual bool	isLeaf () const

BaseNetlistBlock *	shallowCopy (const std::string &instanceName="") const

Public Member Functions inherited from ProGe::IGenerationPhases
virtual	~IGenerationPhases ()

Private Attributes
NetlistPort *	lockReqPortIn_ = nullptr

NetlistPort *	lockReqPortOut_ = nullptr

NetlistPort *	lockPortIn_ = nullptr

NetlistPort *	lockPortOut_ = nullptr

NetlistPort *	instructionPortIn_ = nullptr

NetlistPort *	instructionPortOut_ = nullptr

NetlistPort *	startPortIn_ = nullptr

NetlistPort *	stopPortIn_ = nullptr

NetlistPort *	loopBodySizePortIn_ = nullptr

NetlistPort *	loopIterationPortIn_ = nullptr

NetlistPort *	lenCntrPortOut_ = nullptr

NetlistPort *	loopFromImemPortOut_ = nullptr

std::string	implmenetationFile_ = ""

std::string	entityStr_ = "tta0"

Additional Inherited Members
Public Types inherited from ProGe::BaseNetlistBlock
typedef std::vector< BaseNetlistBlock * >	BlockContainerType

typedef std::vector< Parameter >	ParameterContainerType

typedef std::vector< NetlistPort * >	PortContainerType

typedef std::vector< NetlistPortGroup * >	PortGroupContainerType

Protected Member Functions inherited from ProGe::BaseNetlistBlock
Netlist &	netlist ()

virtual NetlistPort &	port (size_t index)

virtual BaseNetlistBlock &	subBlock (size_t index)

virtual BaseNetlistBlock &	parentBlock ()

void	setModuleName (const std::string &name)

void	addSubBlock (BaseNetlistBlock *subBlock, const std::string &instanceName="")

void	deleteSubBlock (BaseNetlistBlock *subBlock)

void	removeSubBlock (BaseNetlistBlock *subBlock)

NetlistPort *	addPort (NetlistPort *port)

void	removePort (NetlistPort *port)

void	addPortGroup (NetlistPortGroup *portGroup)

void	removePortGroup (NetlistPortGroup *portGroup)

void	setParameter (const Parameter &param)

void	addParameter (const Parameter &param)

Parameter &	parameter (const std::string &name)

NetlistPort *	findPort (const std::string &portName, bool recursiveSearch=false, bool partialMatch=true) const

void	addPackage (const std::string &packageName)

void	connectClocks ()

void	connectResets ()

Detailed Description

Definition at line 51 of file LoopBufferBlock.hh.

Constructor & Destructor Documentation

◆ LoopBufferBlock() [1/2]

ProGe::LoopBufferBlock::LoopBufferBlock ( )

delete

◆ LoopBufferBlock() [2/2]

ProGe::LoopBufferBlock::LoopBufferBlock	(	const ProGeContext &	context,
		BaseNetlistBlock *	parent = `nullptr`
	)

Constructs the loop buffer block that automatically selects suitable implementation.

The constructor inspects operations in the CU of the machine and selects an appropriate loop buffer implementation.

Exceptions

NotAvailable If the CU does not include an operation, which utilizes the loop buffer.

Definition at line 58 of file LoopBufferBlock.cc.

     : BaseNetlistBlock("not_set_yet", "loopbuffer", parent) {
     MachineInfo::OperationSet cuOps;
     cuOps = MachineInfo::getOpset(*context.adf().controlUnit());
  
     if (!cuOps.count("hwloop") && !cuOps.count("lbufs") &&
         !cuOps.count("infloop")) {
         THROW_EXCEPTION(
             NotAvailable,
             "Could not recognize any loop buffer "
             "utilizing operations in CU");
     } else if (cuOps.count("hwloop") && cuOps.count("lbufs")) {
         THROW_EXCEPTION(
             NotAvailable,
             "Can not support hwloop and lbufs "
             "operation combination.");
     } else if (cuOps.count("lbufs") && cuOps.count("infloop")) {
         THROW_EXCEPTION(
             NotAvailable,
             "Can not support lbufs and infloop "
             "operation combination.");
     }
  
     entityStr_ = context.coreEntityName();
  
     // Common block construction //
     setParameter(Parameter("depth", "integer", ""));
     setParameter(Parameter("instw", "integer", ""));
     setParameter(Parameter("core_id", "integer", "0"));
     setParameter(Parameter("enable_usage_trace", "boolean", "false"));
  
     addPort(PortFactory::clockPort());
     addPort(PortFactory::resetPort())->rename("rstx");
  
     lockReqPortIn_ = addPort(new InBitPort("lock_req_in"));
     lockReqPortOut_ = addPort(new OutBitPort("lock_req_out"));
     lockPortIn_ = addPort(new InBitPort("glock_in"));
     lockPortOut_ = addPort(new OutBitPort("glock_out"));
     // note: port widths "IMEMWIDTHINMAUS*IMEMMAUWIDTH", "LBUFMAXDEPTH" and
     // "LBUFMAXITER" are temporary solutions for instancing blocks. The actual
     // port width formulas use generics.
     instructionPortIn_ =
         addPort(new InPort("fetchblock_in", "IMEMWIDTHINMAUS*IMEMMAUWIDTH"));
     instructionPortOut_ =
         addPort(new OutPort("dispatch_out", "IMEMWIDTHINMAUS*IMEMMAUWIDTH"));
     startPortIn_ = addPort(new InBitPort("loop_start_in"));
  
     if (cuOps.count("hwloop")) {
         loopBodySizePortIn_ =
             addPort(new InPort("loop_len_in", "IMEMADDRWIDTH"));
     } else {
         loopBodySizePortIn_ =
             addPort(new InPort("loop_len_in", "bit_width(LBUFMAXDEPTH+1)"));
     }
  
     // Ports used with HWLOOP
     if (cuOps.count("hwloop")) {
         lenCntrPortOut_ =
             addPort(new OutPort("len_cntr_out", "IMEMADDRWIDTH"));
         loopFromImemPortOut_ = addPort(new OutBitPort("loop_from_imem_out"));
     }
  
     // Variated block construction //
     // note: assuming here that only one operation in CU utilizes loop buffer.
     if (cuOps.count("hwloop")) {
         if (cuOps.count("lbufc")) {
             THROW_EXCEPTION(
                 NotAvailable,
                 "BREAK-operation is not currently "
                 "available with HWLOOP operation.");
         }
         setModuleName(context.coreEntityName() + "_hwloop");
         addParameter(Parameter("iterw", "integer", ""));
         loopIterationPortIn_ =
             addPort(new InPort("loop_iter_in", "LBUFMAXITER"));
         implmenetationFile_ = "hwloop";
     } else if (cuOps.count("lbufs")) {
         if (cuOps.count("lbufc")) {
             THROW_EXCEPTION(
                 NotAvailable,
                 "BREAK-operation is not currently "
                 "available with LBUFS operation.");
         }
         setModuleName(context.coreEntityName() + "_loopbuf");
         addParameter(Parameter("iterw", "integer", ""));
         loopIterationPortIn_ =
             addPort(new InPort("loop_iter_in", "LBUFMAXITER"));
         implmenetationFile_ = "loopbuffer";
     } else if (cuOps.count("infloop")) {
         if (cuOps.count("lbufc")) {
             stopPortIn_ = addPort(new InBitPort("loop_stop_in"));
         }
         setModuleName(context.coreEntityName() + "_inflooper");
         implmenetationFile_ = "inflooper";
     } else {
         assert(false);
     }
 }

References ProGe::BaseNetlistBlock::addParameter(), ProGe::BaseNetlistBlock::addPort(), ProGe::ProGeContext::adf(), assert, ProGe::PortFactory::clockPort(), TTAMachine::Machine::controlUnit(), ProGe::ProGeContext::coreEntityName(), entityStr_, MachineInfo::getOpset(), implmenetationFile_, instructionPortIn_, instructionPortOut_, lenCntrPortOut_, lockPortIn_, lockPortOut_, lockReqPortIn_, lockReqPortOut_, loopBodySizePortIn_, loopFromImemPortOut_, loopIterationPortIn_, ProGe::BaseNetlistBlock::Parameter, ProGe::NetlistPort::rename(), ProGe::PortFactory::resetPort(), ProGe::BaseNetlistBlock::setModuleName(), ProGe::BaseNetlistBlock::setParameter(), startPortIn_, stopPortIn_, and THROW_EXCEPTION.

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◆ ~LoopBufferBlock()

ProGe::LoopBufferBlock::~LoopBufferBlock ( )

virtual

Definition at line 159 of file LoopBufferBlock.cc.

                                   {
     // Managed by BaseNetlistBlock
 }

Member Function Documentation

◆ instructionPortIn()

const NetlistPort & ProGe::LoopBufferBlock::instructionPortIn ( ) const

Returns input port for instruction word.

Definition at line 263 of file LoopBufferBlock.cc.

                                          {
     assert(instructionPortIn_ != nullptr && "Unset port.");
     return *instructionPortIn_;
 }

References assert, and instructionPortIn_.

◆ instructionPortOut()

const NetlistPort & ProGe::LoopBufferBlock::instructionPortOut ( ) const

Returns output port for instruction word.

Definition at line 272 of file LoopBufferBlock.cc.

                                           {
     assert(instructionPortOut_ != nullptr && "Unset port.");
     return *instructionPortOut_;
 }

References assert, and instructionPortOut_.

◆ lenCntrPortOut()

const NetlistPort & ProGe::LoopBufferBlock::lenCntrPortOut ( ) const

Returns control port for outputting current loop instruction index.

Definition at line 321 of file LoopBufferBlock.cc.

                                       {
     assert(lenCntrPortOut_ != nullptr && "Unset port.");
     return *lenCntrPortOut_;
 }

References assert, and lenCntrPortOut_.

◆ lockPortIn()

const NetlistPort & ProGe::LoopBufferBlock::lockPortIn ( ) const

Returns (global) lock input port.

Definition at line 245 of file LoopBufferBlock.cc.

                                   {
     assert(lockPortIn_ != nullptr && "Unset port.");
     return *lockPortIn_;
 }

References assert, and lockPortIn_.

◆ lockPortOut()

const NetlistPort & ProGe::LoopBufferBlock::lockPortOut ( ) const

Returns (global) lock output port.

Definition at line 254 of file LoopBufferBlock.cc.

                                    {
     assert(lockPortOut_ != nullptr && "Unset port.");
     return *lockPortOut_;
 }

References assert, and lockPortOut_.

◆ lockReqPortIn()

const NetlistPort & ProGe::LoopBufferBlock::lockReqPortIn ( ) const

Returns (global) lock request input port.

Definition at line 227 of file LoopBufferBlock.cc.

                                      {
     assert(lockReqPortIn_ != nullptr && "Unset port.");
     return *lockReqPortIn_;
 }

References assert, and lockReqPortIn_.

◆ lockReqPortOut()

const NetlistPort & ProGe::LoopBufferBlock::lockReqPortOut ( ) const

Returns (global) lock request output port.

Definition at line 236 of file LoopBufferBlock.cc.

                                       {
     assert(lockReqPortOut_ != nullptr && "Unset port.");
     return *lockReqPortOut_;
 }

References assert, and lockReqPortOut_.

◆ loopBodySizePortIn()

const NetlistPort & ProGe::LoopBufferBlock::loopBodySizePortIn ( ) const

Returns control port for setting loop body size.

Definition at line 301 of file LoopBufferBlock.cc.

                                           {
     assert(loopBodySizePortIn_ != nullptr && "Unset port.");
     return *loopBodySizePortIn_;
 }

References assert, and loopBodySizePortIn_.

◆ loopFromImemPortOut()

const NetlistPort & ProGe::LoopBufferBlock::loopFromImemPortOut ( ) const

Returns control port for indicating that loop is executed from outside of loopbuffer module.

Definition at line 331 of file LoopBufferBlock.cc.

                                            {
     assert(loopFromImemPortOut_ != nullptr && "Unset port.");
     return *loopFromImemPortOut_;
 }

References assert, and loopFromImemPortOut_.

◆ loopIterationPortIn()

const NetlistPort * ProGe::LoopBufferBlock::loopIterationPortIn ( ) const

Returns control port for setting iteration count.

Returns: The control port for setting iteration count, if applicable. Otherwise, returns nullptr denoting unavailability of the port.

Definition at line 313 of file LoopBufferBlock.cc.

                                            {
     return loopIterationPortIn_;
 }

References loopIterationPortIn_.

◆ setBlockWidthParameter()

void ProGe::LoopBufferBlock::setBlockWidthParameter ( const std::string value )

Sets the width of the blocks (i.e. instructions).

Definition at line 167 of file LoopBufferBlock.cc.

                                                              {
     setParameter(Parameter("instw", "integer", value));
 }

References ProGe::BaseNetlistBlock::Parameter, and ProGe::BaseNetlistBlock::setParameter().

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◆ setBufferSizeParameter()

void ProGe::LoopBufferBlock::setBufferSizeParameter ( const std::string value )

Sets the depth of the loop buffer.

The depth is the number of blocks that can be stored in the buffer at most.

Definition at line 178 of file LoopBufferBlock.cc.

                                                              {
     setParameter(Parameter("depth", "integer", value));
 }

References ProGe::BaseNetlistBlock::Parameter, and ProGe::BaseNetlistBlock::setParameter().

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◆ setCoreIdParameter()

void ProGe::LoopBufferBlock::setCoreIdParameter ( const std::string value )

Sets core id for usage tracing.

By default the core id is set to "0".

Definition at line 203 of file LoopBufferBlock.cc.

                                                          {
     setParameter(Parameter("core_id", "integer", value));
 }

References ProGe::BaseNetlistBlock::Parameter, and ProGe::BaseNetlistBlock::setParameter().

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◆ setIterationPortWidthParameter()

void ProGe::LoopBufferBlock::setIterationPortWidthParameter ( const std::string value )

Sets the width of control port for iteration count if applicable.

The maximum amount of iterations via the port is 2^n-1, where n is the port width.

Definition at line 190 of file LoopBufferBlock.cc.

                                                                      {
     // Constructor creates the parameter when needed.
     if (hasParameter("iterw")) {
         setParameter(Parameter("iterw", "integer", value));
     }
 }

References ProGe::BaseNetlistBlock::hasParameter(), ProGe::BaseNetlistBlock::Parameter, and ProGe::BaseNetlistBlock::setParameter().

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◆ setUsageTracingParameter()

void ProGe::LoopBufferBlock::setUsageTracingParameter ( bool value )

Sets usage tracing.

By default the trace is disabled (set to false).

When enabled the instance dumps the usage trace into a file (core<core_id>_l0_access_trace.dump) in RTL-simulation.

Definition at line 217 of file LoopBufferBlock.cc.

                                                     {
     setParameter(
         Parameter("enable_usage_trace", "boolean", value ? "true" : "false"));
 }

References ProGe::BaseNetlistBlock::Parameter, and ProGe::BaseNetlistBlock::setParameter().

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◆ startPortIn()

const NetlistPort & ProGe::LoopBufferBlock::startPortIn ( ) const

Returns control port for starting loop buffer.

Definition at line 281 of file LoopBufferBlock.cc.

                                    {
     assert(startPortIn_ != nullptr && "Unset port.");
     return *startPortIn_;
 }

References assert, and startPortIn_.

◆ stopPortIn()

const NetlistPort * ProGe::LoopBufferBlock::stopPortIn ( ) const

Returns port that is used to stop looping.

Returns: The stop looping control port, if applicable. Otherwise, returns nullptr denoting unavailability of the port.

Definition at line 293 of file LoopBufferBlock.cc.

                                   {
     return stopPortIn_;
 }

References stopPortIn_.

Referenced by write().

◆ write()

void ProGe::LoopBufferBlock::write	(	const Path &	targetBaseDir,
		HDL	targetLang = `VHDL`
	)		const

overridevirtual

Does nothing on self but calls write function on each sub block.

Reimplemented from ProGe::BaseNetlistBlock.

Definition at line 337 of file LoopBufferBlock.cc.

                                                                       {
     if (targetLang != HDL::VHDL) {
         THROW_EXCEPTION(NotAvailable, "Unsupported HDL language.");
     }
     assert(moduleName() != "not_set_yet");
  
     std::string target = targetBaseDir.string() +
                          FileSystem::DIRECTORY_SEPARATOR + "gcu_ic" +
                          FileSystem::DIRECTORY_SEPARATOR;
  
     bool usesLoopBreaking = stopPortIn() != nullptr;
  
     Path progeDataDir(Environment::dataDirPath("ProGe"));
     HDLTemplateInstantiator instantiator(entityStr_);
  
     if (usesLoopBreaking) {
         instantiator.replacePlaceholder(
             "port-declarations",
             "-- Stops looping\n"
             "loop_stop_in : in std_logic;");
         instantiator.replacePlaceholderFromFile(
             "fsm-logic",
             progeDataDir / "inflooper_fsm_with_stopping.snippet");
         instantiator.replacePlaceholderFromFile(
             "signal-declarations",
             progeDataDir / "inflooper_stop_signals.snippet");
         instantiator.replacePlaceholderFromFile(
             "stop-reg", progeDataDir / "inflooper_stop_register.snippet");
     } else {
         instantiator.replacePlaceholderFromFile(
             "fsm-logic", progeDataDir / "inflooper_fsm_default.snippet");
     }
  
     instantiator.instantiateTemplateFile(
         (progeDataDir / (implmenetationFile_ + ".vhdl.tmpl")).string(),
         target + implmenetationFile_ + ".vhdl");
 }

References assert, Environment::dataDirPath(), FileSystem::DIRECTORY_SEPARATOR, entityStr_, implmenetationFile_, HDLTemplateInstantiator::instantiateTemplateFile(), ProGe::BaseNetlistBlock::moduleName(), HDLTemplateInstantiator::replacePlaceholder(), HDLTemplateInstantiator::replacePlaceholderFromFile(), stopPortIn(), THROW_EXCEPTION, and ProGe::VHDL.

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Member Data Documentation

◆ entityStr_

std::string ProGe::LoopBufferBlock::entityStr_ = "tta0"

private

Definition at line 96 of file LoopBufferBlock.hh.

Referenced by LoopBufferBlock(), and write().

◆ implmenetationFile_

std::string ProGe::LoopBufferBlock::implmenetationFile_ = ""

private

Definition at line 95 of file LoopBufferBlock.hh.

Referenced by LoopBufferBlock(), and write().

◆ instructionPortIn_

NetlistPort* ProGe::LoopBufferBlock::instructionPortIn_ = nullptr

private

Definition at line 86 of file LoopBufferBlock.hh.

Referenced by instructionPortIn(), and LoopBufferBlock().

◆ instructionPortOut_

NetlistPort* ProGe::LoopBufferBlock::instructionPortOut_ = nullptr

private

Definition at line 87 of file LoopBufferBlock.hh.

Referenced by instructionPortOut(), and LoopBufferBlock().

◆ lenCntrPortOut_

NetlistPort* ProGe::LoopBufferBlock::lenCntrPortOut_ = nullptr

private

Definition at line 92 of file LoopBufferBlock.hh.

Referenced by lenCntrPortOut(), and LoopBufferBlock().

◆ lockPortIn_

NetlistPort* ProGe::LoopBufferBlock::lockPortIn_ = nullptr

private

Definition at line 84 of file LoopBufferBlock.hh.

Referenced by lockPortIn(), and LoopBufferBlock().

◆ lockPortOut_

NetlistPort* ProGe::LoopBufferBlock::lockPortOut_ = nullptr

private

Definition at line 85 of file LoopBufferBlock.hh.

Referenced by lockPortOut(), and LoopBufferBlock().

◆ lockReqPortIn_

NetlistPort* ProGe::LoopBufferBlock::lockReqPortIn_ = nullptr

private

Definition at line 82 of file LoopBufferBlock.hh.

Referenced by lockReqPortIn(), and LoopBufferBlock().

◆ lockReqPortOut_

NetlistPort* ProGe::LoopBufferBlock::lockReqPortOut_ = nullptr

private

Definition at line 83 of file LoopBufferBlock.hh.

Referenced by lockReqPortOut(), and LoopBufferBlock().

◆ loopBodySizePortIn_

NetlistPort* ProGe::LoopBufferBlock::loopBodySizePortIn_ = nullptr

private

Definition at line 90 of file LoopBufferBlock.hh.

Referenced by loopBodySizePortIn(), and LoopBufferBlock().

◆ loopFromImemPortOut_

NetlistPort* ProGe::LoopBufferBlock::loopFromImemPortOut_ = nullptr

private

Definition at line 93 of file LoopBufferBlock.hh.

Referenced by LoopBufferBlock(), and loopFromImemPortOut().

◆ loopIterationPortIn_

NetlistPort* ProGe::LoopBufferBlock::loopIterationPortIn_ = nullptr

private

Definition at line 91 of file LoopBufferBlock.hh.

Referenced by LoopBufferBlock(), and loopIterationPortIn().

◆ startPortIn_

NetlistPort* ProGe::LoopBufferBlock::startPortIn_ = nullptr

private

Definition at line 88 of file LoopBufferBlock.hh.

Referenced by LoopBufferBlock(), and startPortIn().

◆ stopPortIn_

NetlistPort* ProGe::LoopBufferBlock::stopPortIn_ = nullptr

private

Definition at line 89 of file LoopBufferBlock.hh.

Referenced by LoopBufferBlock(), and stopPortIn().

The documentation for this class was generated from the following files:

Public Member Functions

Private Attributes

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ LoopBufferBlock() [1/2]

◆ LoopBufferBlock() [2/2]

◆ ~LoopBufferBlock()

Member Function Documentation

◆ instructionPortIn()

◆ instructionPortOut()

◆ lenCntrPortOut()

◆ lockPortIn()

◆ lockPortOut()

◆ lockReqPortIn()

◆ lockReqPortOut()

◆ loopBodySizePortIn()

◆ loopFromImemPortOut()

◆ loopIterationPortIn()

◆ setBlockWidthParameter()

◆ setBufferSizeParameter()

◆ setCoreIdParameter()

◆ setIterationPortWidthParameter()

◆ setUsageTracingParameter()

◆ startPortIn()

◆ stopPortIn()

◆ write()

Member Data Documentation

◆ entityStr_

◆ implmenetationFile_

◆ instructionPortIn_

◆ instructionPortOut_

◆ lenCntrPortOut_

◆ lockPortIn_

◆ lockPortOut_

◆ lockReqPortIn_

◆ lockReqPortOut_

◆ loopBodySizePortIn_

◆ loopFromImemPortOut_

◆ loopIterationPortIn_

◆ startPortIn_

◆ stopPortIn_